addrmap STM32H7_CRYPTO {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Control";
        regwidth=0x20;
            field {
                sw = rw;
            } Algorithm_direction[2:2];
            field {
                sw = rw;
            } Algorithm_mode_0_2[5:3];
            field {
                sw = rw;
            } Data_type_selection[7:6];
            field {
                sw = rw;
            } Key_size_AES_mode_only[9:8];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } FIFO_flush[14:14];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } CRYPTO_Enable[15:15];
            field {
                sw = rw;
            } GCM_or_CCM_Phase[17:16];
            field {
                sw = rw;
            } Algorithm_mode_3[19:19];
    } Control @ 0x0;
    reg {
        name="Status";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Input_FIFO_empty_IFEM[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Input_FIFO_not_full_IFNF[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Output_FIFO_not_empty_OFNE[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Output_FIFO_full_OFFU[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } CRYPTO_is_Busy[4:4];
    } Status @ 0x4;
    reg {
        name="DataInput";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } Data_input[31:0];
    } DataInput @ 0x8;
    reg {
        name="DataOutput";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Data_output[31:0];
    } DataOutput @ 0xc;
    reg {
        name="DMAControl";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DIEN[0:0];
            field {
                sw = rw;
            } DOEN[1:1];
    } DMAControl @ 0x10;
    reg {
        name="InterruptMaskSetClear";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
            } Input_FIFO_service_interrupt_mask_INIM[0:0];
            field {
                sw = rw;
            } Output_FIFO_service_interrupt_mask_OUTIM[1:1];
    } InterruptMaskSetClear @ 0x14;
    reg {
        name="RawInterruptStatus";
        regwidth=0x20;
            field {
                sw = r;
            } Input_FIFO_service_raw_interrupt_status_INRIS[0:0];
            field {
                sw = r;
            } Output_FIFO_service_raw_interrupt_status_OUTRIS[1:1];
    } RawInterruptStatus @ 0x18;
    reg {
        name="MaskedInterruptStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Input_FIFO_service_masked_interrupt_status_INMIS[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Output_FIFO_service_masked_interrupt_status_OUTMIS[1:1];
    } MaskedInterruptStatus @ 0x1c;
    reg {
        name="Key0L";
        regwidth=0x20;
            field {
                sw = rw;
            } KeyregisterIndex___2registerIndex__2__0__R___L[31:0];
    } Key0L [8]@ 0x20 += 4;
    reg {
        name="InitializationVector0L";
        regwidth=0x20;
            field {
                sw = rw;
            } IVregisterIndex___2registerIndex__2__0__R___L[31:0];
    } InitializationVector0L [4]@ 0x40 += 4;
    reg {
        name="ContentSwapGCM_CCM0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM0 @ 0x50;
    reg {
        name="ContentSwapGCM_CCM1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM1 @ 0x54;
    reg {
        name="ContentSwapGCM_CCM2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM2 @ 0x58;
    reg {
        name="ContentSwapGCM_CCM3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM3 @ 0x5c;
    reg {
        name="ContentSwapGCM_CCM4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM4 @ 0x60;
    reg {
        name="ContentSwapGCM_CCM5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM5 @ 0x64;
    reg {
        name="ContentSwapGCM_CCM6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM6 @ 0x68;
    reg {
        name="ContentSwapGCM_CCM7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM_CCM7 @ 0x6c;
    reg {
        name="ContentSwapGCM0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM0 @ 0x70;
    reg {
        name="ContentSwapGCM1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM1 @ 0x74;
    reg {
        name="ContentSwapGCM2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM2 @ 0x78;
    reg {
        name="ContentSwapGCM3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM3 @ 0x7c;
    reg {
        name="ContentSwapGCM4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM4 @ 0x80;
    reg {
        name="ContentSwapGCM5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM5 @ 0x84;
    reg {
        name="ContentSwapGCM6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM6 @ 0x88;
    reg {
        name="ContentSwapGCM7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ContentSwapGCM7 @ 0x8c;
} Registers_addrmap;


};