addrmap SAMD5_UART {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="ControlA0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlA0 @ 0x0;
    reg {
        name="ControlA1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlA1 @ 0x1;
    reg {
        name="ControlA2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlA2 @ 0x2;
    reg {
        name="ControlA3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlA3 @ 0x3;
    reg {
        name="ControlB0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlB0 @ 0x4;
    reg {
        name="ControlB1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlB1 @ 0x5;
    reg {
        name="ControlB2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlB2 @ 0x6;
    reg {
        name="ControlB3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlB3 @ 0x7;
    reg {
        name="ControlC0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlC0 @ 0x8;
    reg {
        name="ControlC1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlC1 @ 0x9;
    reg {
        name="ControlC2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlC2 @ 0xa;
    reg {
        name="ControlC3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlC3 @ 0xb;
    reg {
        name="Baud0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Baud0 @ 0xc;
    reg {
        name="Baud1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Baud1 @ 0xd;
    reg {
        name="ReceivePulseLength";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReceivePulseLength @ 0xe;
    reg {
        name="InterruptEnableClear";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
                onwrite = woclr;
            } DRE___Data_Register_Empty_Interrupt_Enable[0:0];
            field {
                sw = rw;
                onwrite = woclr;
            } TXC___Transmit_Complete_Interrupt_Enable[1:1];
            field {
                sw = rw;
                onwrite = woclr;
            } RXC___Receive_Complete_Interrupt_Enable[2:2];
            field {
                sw = rw;
                onwrite = woclr;
            } RXS___Receive_Start_Interrupt_Enable[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CTSIC___Clear_To_Send_Input_Change_Interrupt_Enable[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXBRK___Receive_Break_Interrupt_Enable[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ERROR_Interrupt_Enable[7:7];
    } InterruptEnableClear @ 0x14;
    reg {
        name="InterruptEnableSet";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } DRE___Data_Register_Empty_Interrupt_Enable[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } TXC___Transmit_Complete_Interrupt_Enable[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } RXC___Receive_Complete_Interrupt_Enable[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } RXS___Receive_Start_Interrupt_Enable[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CTSIC___Clear_To_Send_Input_Change_Interrupt_Enable[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXBRK___Receive_Break_Interrupt_Enable[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ERROR_Interrupt_Enable[7:7];
    } InterruptEnableSet @ 0x16;
    reg {
        name="InterruptFlag";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } DRE___Data_Register_Empty[0:0];
            field {
                sw = rw;
                onwrite = woclr;
            } TXC___Transmit_Complete[1:1];
            field {
                sw = r;
            } RXC___Receive_Complete[2:2];
            field {
                sw = rw;
                onwrite = woclr;
            } RXS___Receive_Start[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CTSIC___Clear_To_Send_Input_Change[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXBRK___Receive_Break[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ERROR[7:7];
    } InterruptFlag @ 0x18;
    reg {
        name="Status0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status0 @ 0x1a;
    reg {
        name="Status1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status1 @ 0x1b;
    reg {
        name="SynchronizationBusy0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SynchronizationBusy0 @ 0x1c;
    reg {
        name="SynchronizationBusy1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SynchronizationBusy1 @ 0x1d;
    reg {
        name="SynchronizationBusy2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SynchronizationBusy2 @ 0x1e;
    reg {
        name="SynchronizationBusy3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SynchronizationBusy3 @ 0x1f;
    reg {
        name="ReceiveErrorCount";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReceiveErrorCount @ 0x20;
    reg {
        name="Length0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Length0 @ 0x22;
    reg {
        name="Length1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Length1 @ 0x23;
    reg {
        name="DataRegister0";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } DATA[7:0];
    } DataRegister0 @ 0x28;
    reg {
        name="DataRegister1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRegister1 @ 0x29;
    reg {
        name="DataRegister2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRegister2 @ 0x2a;
    reg {
        name="DataRegister3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRegister3 @ 0x2b;
    reg {
        name="DebugControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DebugControl @ 0x30;
} Registers_addrmap;


};