addrmap MPFS_SDController {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="GeneralInformation_HRS00";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } GeneralInformation_HRS00 @ 0x0;
    reg {
        name="DebounceSetting_HRS01";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DebounceSetting_HRS01 @ 0x4;
    reg {
        name="BusSetting_HRS02";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BusSetting_HRS02 @ 0x8;
    reg {
        name="AXIEErrorResponses_HRS03";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AXIEErrorResponses_HRS03 @ 0xc;
    reg {
        name="PhySettings_HRS04";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
            } UHS_I_Delay_Address_Pointer_USI_ADDR[5:0];
            field {
                sw = rw;
            } UHS_I_Settings_Write_Data_UIS_WDATA[15:8];
            field {
                sw = r;
            } UHS_I_Settings_Read_Data_UIS_RDATA[20:16];
            field {
                sw = rw;
            } UHS_I_Settings_Write_Request_UIS_WR[24:24];
            field {
                sw = rw;
            } UHS_I_Settings_Read_Request_UIS_RD[25:25];
            field {
                sw = r;
            } UHS_I_Settings_Acknowledge_UIS_ACK[26:26];
    } PhySettings_HRS04 @ 0x10;
    reg {
        name="EMMCControl_HRS06";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } EMMCControl_HRS06 @ 0x18;
    reg {
        name="IODelayInformation_HRS07";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IODelayInformation_HRS07 @ 0x1c;
    reg {
        name="HostCapability_HRS30";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HostCapability_HRS30 @ 0x78;
    reg {
        name="HostControllerVersion_HRS31";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HostControllerVersion_HRS31 @ 0x7c;
    reg {
        name="FSMMonitor_HRS32";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FSMMonitor_HRS32 @ 0x80;
    reg {
        name="TuneStatus0_HRS33";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TuneStatus0_HRS33 @ 0x84;
    reg {
        name="TuneStatus1_HRS34";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TuneStatus1_HRS34 @ 0x88;
    reg {
        name="TuneDebug_HRS35";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TuneDebug_HRS35 @ 0x8c;
    reg {
        name="BootStatus_HRS36";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BootStatus_HRS36 @ 0x90;
    reg {
        name="ReadBlockGapCoefficientInterfaceModeSelect_HRS37";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadBlockGapCoefficientInterfaceModeSelect_HRS37 @ 0x94;
    reg {
        name="ReadBlockGapCoefficient_HRS38";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadBlockGapCoefficient_HRS38 @ 0x98;
    reg {
        name="HostControllerVersion_SlotInterruptStatus_CRS63";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HostControllerVersion_SlotInterruptStatus_CRS63 @ 0xfc;
    reg {
        name="SDMASystemAddressArgument2_SRS00";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } SDMA_Address[31:0];
    } SDMASystemAddressArgument2_SRS00 @ 0x200;
    reg {
        name="BlockSizeBlockCount_SRS01";
        regwidth=0x20;
            field {
                sw = rw;
            } Transfer_Block_Size_TBS[11:0];
            field {
                sw = rw;
            } Block_Count_For_Current_Transfer_BCCT[31:16];
    } BlockSizeBlockCount_SRS01 @ 0x204;
    reg {
        name="Argument1_SRS02";
        regwidth=0x20;
            field {
                sw = rw;
            } Command_Argument_1_ARG1[31:0];
    } Argument1_SRS02 @ 0x208;
    reg {
        name="CommandTransferMode_SRS03";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandTransferMode_SRS03 @ 0x20c;
    reg {
        name="Response1_SRS04";
        regwidth=0x20;
            field {
                sw = r;
            } Response_Register_1_RESP1[31:0];
    } Response1_SRS04 @ 0x210;
    reg {
        name="Response2_SRS05";
        regwidth=0x20;
            field {
                sw = r;
            } Response_Register_2_RESP2[31:0];
    } Response2_SRS05 @ 0x214;
    reg {
        name="Response3_SRS06";
        regwidth=0x20;
            field {
                sw = r;
            } Response_Register_3_RESP3[31:0];
    } Response3_SRS06 @ 0x218;
    reg {
        name="Response4_SRS07";
        regwidth=0x20;
            field {
                sw = r;
            } Response_Register_4_RESP4[31:0];
    } Response4_SRS07 @ 0x21c;
    reg {
        name="DataBuffer_SRS08";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } Buffer_Data_Port_BDP[31:0];
    } DataBuffer_SRS08 @ 0x220;
    reg {
        name="PresentState_SRS09";
        regwidth=0x20;
            field {
                sw = r;
            } Command_Inhibit_CMD_CICMD[0:0];
            field {
                sw = r;
            } Command_Inhibit_DAT_CIDAT[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Buffer_Write_Enable_BWE[10:10];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Buffer_Read_Enable_BRE[11:11];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Card_Inserted_CI[16:16];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Card_State_Stable_CSS[17:17];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Card_Detect_Pin_Level_CDSL[18:18];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Line_Signal_Level_DATSL1___DAT0[20:20];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Line_Signal_Level_DATSL1___DAT1[21:21];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Line_Signal_Level_DATSL1___DAT2[22:22];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Line_Signal_Level_DATSL1___DAT3[23:23];
    } PresentState_SRS09 @ 0x224;
    reg {
        name="HostControl1_SRS10";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HostControl1_SRS10 @ 0x228;
    reg {
        name="HostControl2_SRS11";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Internal_Clock_Stable_ICS[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Software_Reset_For_CMD_Line_SRCMD[25:25];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Software_Reset_For_DAT_Line_SRDAT[26:26];
    } HostControl2_SRS11 @ 0x22c;
    reg {
        name="ErrorNormalInterruptStatus_SRS12";
        regwidth=0x20;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[31:0];
    } ErrorNormalInterruptStatus_SRS12 @ 0x230;
    reg {
        name="ErrorNormalStatusEnable_SRS13";
        regwidth=0x20;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[31:0];
    } ErrorNormalStatusEnable_SRS13 @ 0x234;
    reg {
        name="ErrorNormalSignalEnable_SRS14";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ErrorNormalSignalEnable_SRS14 @ 0x238;
    reg {
        name="HostControl2_SRS15";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HostControl2_SRS15 @ 0x23c;
    reg {
        name="Capabilities1_SRS16";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Timeout_clock_frequency_TCS[5:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Timeout_clock_unit_TCU[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Base_Clock_Frequency_For_SD_Clock_BCSDCLK[15:8];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } ADMA1_Support[19:19];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } SDMA_Support[22:22];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Voltage_Support_3_3V_VS33[24:24];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Voltage_Support_3_0V_VS30[25:25];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Voltage_Support_1_8V_VS18[26:26];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } _64_bit_DMA_Support[28:28];
    } Capabilities1_SRS16 @ 0x240;
    reg {
        name="Capabilities2_SRS17";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Capabilities2_SRS17 @ 0x244;
    reg {
        name="Capabilities3_SRS18";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Capabilities3_SRS18 @ 0x248;
    reg {
        name="Capabilities4_SRS19";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Capabilities4_SRS19 @ 0x24c;
    reg {
        name="ForceEvent_SRS20";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ForceEvent_SRS20 @ 0x250;
    reg {
        name="ADMAErrorStatus_SRS21";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ADMAErrorStatus_SRS21 @ 0x254;
    reg {
        name="DmaSystemAddressLow_SRS22";
        regwidth=0x20;
            field {
                sw = rw;
            } ADMA_SDMA_System_Address_1[31:0];
    } DmaSystemAddressLow_SRS22 @ 0x258;
    reg {
        name="DmaSystemAddressHigh_SRS23";
        regwidth=0x20;
            field {
                sw = rw;
            } ADMA_SDMA_System_Address_2[31:0];
    } DmaSystemAddressHigh_SRS23 @ 0x25c;
    reg {
        name="PresetValue_DefaultSpeed_SRS24";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PresetValue_DefaultSpeed_SRS24 @ 0x260;
    reg {
        name="PresetValue_HighSpeedAndSDR12_SRS25";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PresetValue_HighSpeedAndSDR12_SRS25 @ 0x264;
    reg {
        name="PresetValue_SDR25AndSDR50_SRS26";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PresetValue_SDR25AndSDR50_SRS26 @ 0x268;
    reg {
        name="PresetValue_SDR104AndDDR50_SRS27";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PresetValue_SDR104AndDDR50_SRS27 @ 0x26c;
    reg {
        name="PresetValue_UHSII_SRS29";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PresetValue_UHSII_SRS29 @ 0x274;
    reg {
        name="CommandQueuingVersion_CQRS00";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingVersion_CQRS00 @ 0x400;
    reg {
        name="CommandQueuingCapabilities_CQRS01";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingCapabilities_CQRS01 @ 0x404;
    reg {
        name="CommandQueuingConfiguration_CQRS02";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingConfiguration_CQRS02 @ 0x408;
    reg {
        name="CommandQueuingControl_CQRS03";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingControl_CQRS03 @ 0x40c;
    reg {
        name="CommandQueuingInterruptStatus_CQRS04";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingInterruptStatus_CQRS04 @ 0x410;
    reg {
        name="CommandQueuingInterruptStatusEnable_CQRS05";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingInterruptStatusEnable_CQRS05 @ 0x414;
    reg {
        name="CommandQueuingInterruptSignalEnable_CQRS06";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingInterruptSignalEnable_CQRS06 @ 0x418;
    reg {
        name="InterruptCoalescing_CQRS07";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptCoalescing_CQRS07 @ 0x41c;
    reg {
        name="CommandQueuingTaskDescriptorListBaseAddress_CQRS08";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingTaskDescriptorListBaseAddress_CQRS08 @ 0x420;
    reg {
        name="CommandQueuingTaskDescriptorListBaseAddressUpper32Bits_CQRS09";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingTaskDescriptorListBaseAddressUpper32Bits_CQRS09 @ 0x424;
    reg {
        name="CommandQueuingTaskDoorbell_CQRS10";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandQueuingTaskDoorbell_CQRS10 @ 0x428;
    reg {
        name="TaskCompleteNotification_CQRS11";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TaskCompleteNotification_CQRS11 @ 0x42c;
    reg {
        name="DeviceQueueStatus_CQRS12";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DeviceQueueStatus_CQRS12 @ 0x430;
    reg {
        name="DevicePendingTasks_CQRS13";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DevicePendingTasks_CQRS13 @ 0x434;
    reg {
        name="TaskClear_CQRS14";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TaskClear_CQRS14 @ 0x438;
    reg {
        name="SendStatusConfiguration1_CQRS16";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SendStatusConfiguration1_CQRS16 @ 0x440;
    reg {
        name="SendStatusConfiguration2_CQRS17";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SendStatusConfiguration2_CQRS17 @ 0x444;
    reg {
        name="CommandResponseForDirect_CommandTask_CQRS18";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandResponseForDirect_CommandTask_CQRS18 @ 0x448;
    reg {
        name="ResponseModeErrorMask_CQRS20";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseModeErrorMask_CQRS20 @ 0x450;
    reg {
        name="TaskErrorInformation_CQRS21";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TaskErrorInformation_CQRS21 @ 0x454;
    reg {
        name="CommandResponseIndex_CQRS22";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandResponseIndex_CQRS22 @ 0x458;
    reg {
        name="CommandResponseArgument_CQRS23";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandResponseArgument_CQRS23 @ 0x45c;
} Registers_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="CommandTransferMode_SRS03_0";
        regwidth=0x8;
            field {
                sw = rw;
            } DMA_Enable[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Block_Count_Enable_BCE[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Auto_CMD_Enable_ACE[3:2];
            field {
                sw = rw;
            } Data_Transfer_Direction_Select_DTDS[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Multi_Single_Block_Select_MSBS[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Response_Type_R1_R5_RECT[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Response_Error_Check_Enable_RECE[7:7];
    } CommandTransferMode_SRS03_0 @ 0x20c;
    reg {
        name="CommandTransferMode_SRS03_1";
        regwidth=0x8;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Response_Interrupt_Disable_RID[0:0];
    } CommandTransferMode_SRS03_1 @ 0x20d;
    reg {
        name="CommandTransferMode_SRS03_2";
        regwidth=0x8;
            field {
                sw = rw;
            } Response_Type_Select_RTS[1:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Command_CRC_Check_Enable_CRCCE[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Command_Index_Check_Enable_CICE[4:4];
            field {
                sw = rw;
            } Data_Present_Select_DPS[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Command_Type_CT[7:6];
    } CommandTransferMode_SRS03_2 @ 0x20e;
    reg {
        name="CommandTransferMode_SRS03_3";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
            } Command_Index_CI[5:0];
    } CommandTransferMode_SRS03_3 @ 0x20f;
} ByteRegisters_addrmap;


};