addrmap EFR32xG2_SYSRTC_1 {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="IpVersion";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion @ 0x0;
    reg {
        name="Enable";
        regwidth=0x20;
            field {
                sw = rw;
            } EN[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DISABLING[1:1];
    } Enable @ 0x4;
    reg {
        name="SoftwareReset";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } Swrst[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Resetting[1:1];
    } SoftwareReset @ 0x8;
    reg {
        name="Config";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } Debugrun[0:0];
    } Config @ 0xc;
    reg {
        name="Command";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } START[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } STOP[1:1];
    } Command @ 0x10;
    reg {
        name="Status";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RUNNING[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Lockstatus[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } FAILDETLOCKSTATUS[2:2];
    } Status @ 0x14;
    reg {
        name="Counter";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } CNT[31:0];
    } Counter @ 0x18;
    reg {
        name="SyncBusy";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SyncBusy @ 0x1c;
    reg {
        name="Lock";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } Lockkey[15:0];
    } Lock @ 0x20;
    reg {
        name="FailureDetection";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetection @ 0x30;
    reg {
        name="FailureDetectionLock";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetectionLock @ 0x34;
    reg {
        name="Group0InterruptFlags";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } OVFIF[0:0];
            field {
                sw = rw;
            } COMP0IF[1:1];
            field {
                sw = rw;
            } COMP1IF[2:2];
            field {
                sw = rw;
            } CAP0IF[3:3];
    } Group0InterruptFlags @ 0x40;
    reg {
        name="Group0InterruptEnable";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } OVFIEN[0:0];
            field {
                sw = rw;
            } COMP0IEN[1:1];
            field {
                sw = rw;
            } COMP1IEN[2:2];
            field {
                sw = rw;
            } CAP0IEN[3:3];
    } Group0InterruptEnable @ 0x44;
    reg {
        name="Group0Control";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } CMP0EN[0:0];
            field {
                sw = rw;
            } CMP1EN[1:1];
            field {
                sw = rw;
            } CAP0EN[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } Cmp0cmoa[5:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } Cmp1cmoa[8:6];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } Cap0edge[10:9];
    } Group0Control @ 0x48;
    reg {
        name="Group0Compare0";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } CMP0VALUE[31:0];
    } Group0Compare0 @ 0x4c;
    reg {
        name="Group0Compare1";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } CMP1VALUE[31:0];
    } Group0Compare1 @ 0x50;
    reg {
        name="Group0Capture0";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } CAP0VALUE[31:0];
    } Group0Capture0 @ 0x54;
    reg {
        name="Group0SyncBusy";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0SyncBusy @ 0x58;
    reg {
        name="IpVersion_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Set @ 0x1000;
    reg {
        name="Enable_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Enable_Set @ 0x1004;
    reg {
        name="SoftwareReset_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareReset_Set @ 0x1008;
    reg {
        name="Config_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Config_Set @ 0x100c;
    reg {
        name="Command_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Set @ 0x1010;
    reg {
        name="Status_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Set @ 0x1014;
    reg {
        name="Counter_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Counter_Set @ 0x1018;
    reg {
        name="SyncBusy_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SyncBusy_Set @ 0x101c;
    reg {
        name="Lock_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Lock_Set @ 0x1020;
    reg {
        name="FailureDetection_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetection_Set @ 0x1030;
    reg {
        name="FailureDetectionLock_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetectionLock_Set @ 0x1034;
    reg {
        name="Group0InterruptFlags_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptFlags_Set @ 0x1040;
    reg {
        name="Group0InterruptEnable_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptEnable_Set @ 0x1044;
    reg {
        name="Group0Control_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Control_Set @ 0x1048;
    reg {
        name="Group0Compare0_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare0_Set @ 0x104c;
    reg {
        name="Group0Compare1_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare1_Set @ 0x1050;
    reg {
        name="Group0Capture0_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Capture0_Set @ 0x1054;
    reg {
        name="Group0SyncBusy_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0SyncBusy_Set @ 0x1058;
    reg {
        name="IpVersion_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Clr @ 0x2000;
    reg {
        name="Enable_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Enable_Clr @ 0x2004;
    reg {
        name="SoftwareReset_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareReset_Clr @ 0x2008;
    reg {
        name="Config_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Config_Clr @ 0x200c;
    reg {
        name="Command_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Clr @ 0x2010;
    reg {
        name="Status_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Clr @ 0x2014;
    reg {
        name="Counter_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Counter_Clr @ 0x2018;
    reg {
        name="SyncBusy_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SyncBusy_Clr @ 0x201c;
    reg {
        name="Lock_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Lock_Clr @ 0x2020;
    reg {
        name="FailureDetection_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetection_Clr @ 0x2030;
    reg {
        name="FailureDetectionLock_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetectionLock_Clr @ 0x2034;
    reg {
        name="Group0InterruptFlags_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptFlags_Clr @ 0x2040;
    reg {
        name="Group0InterruptEnable_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptEnable_Clr @ 0x2044;
    reg {
        name="Group0Control_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Control_Clr @ 0x2048;
    reg {
        name="Group0Compare0_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare0_Clr @ 0x204c;
    reg {
        name="Group0Compare1_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare1_Clr @ 0x2050;
    reg {
        name="Group0Capture0_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Capture0_Clr @ 0x2054;
    reg {
        name="Group0SyncBusy_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0SyncBusy_Clr @ 0x2058;
    reg {
        name="IpVersion_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Tgl @ 0x3000;
    reg {
        name="Enable_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Enable_Tgl @ 0x3004;
    reg {
        name="SoftwareReset_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareReset_Tgl @ 0x3008;
    reg {
        name="Config_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Config_Tgl @ 0x300c;
    reg {
        name="Command_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Tgl @ 0x3010;
    reg {
        name="Status_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Tgl @ 0x3014;
    reg {
        name="Counter_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Counter_Tgl @ 0x3018;
    reg {
        name="SyncBusy_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SyncBusy_Tgl @ 0x301c;
    reg {
        name="Lock_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Lock_Tgl @ 0x3020;
    reg {
        name="FailureDetection_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetection_Tgl @ 0x3030;
    reg {
        name="FailureDetectionLock_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FailureDetectionLock_Tgl @ 0x3034;
    reg {
        name="Group0InterruptFlags_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptFlags_Tgl @ 0x3040;
    reg {
        name="Group0InterruptEnable_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0InterruptEnable_Tgl @ 0x3044;
    reg {
        name="Group0Control_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Control_Tgl @ 0x3048;
    reg {
        name="Group0Compare0_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare0_Tgl @ 0x304c;
    reg {
        name="Group0Compare1_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Compare1_Tgl @ 0x3050;
    reg {
        name="Group0Capture0_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0Capture0_Tgl @ 0x3054;
    reg {
        name="Group0SyncBusy_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Group0SyncBusy_Tgl @ 0x3058;
} Registers_addrmap;


};