addrmap AmbiqApollo4_GPIO {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="PinConfiguration0";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
        `ifdef VARIANT0
            field {
                sw = rw;
                reset=4'b11;
            } FUNCSELregIdx___Function_select_for_GPIO_pin_regIdx[3:0];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } INPENregIdx___Input_enable_for_GPIO_regIdx[4:4];
            field {
                sw = rw;
            } RDZEROregIdx___Return_0_for_read_data_on_GPIO_regIdx[5:5];
            field {
                sw = rw;
            } IRPTENregIdx___Interrupt_enable_for_GPIO_regIdx[7:6];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } OUTCFGregIdx___Pin_IO_mode_selection_for_GPIO_pin_regIdx[9:8];
        `elsif VARIANT5
            field {
                sw = rw;
            } DSregIdx___Drive_strength_selection_for_GPIO_regIdx[11:10];
            field {
                sw = rw;
            } SRregIdx___Configure_the_slew_rate[12:12];
            field {
                sw = rw;
            } PULLCFG30___Pullup_Pulldown_configuration_for_GPIO_regIdx[15:13];
            field {
                sw = rw;
            } NCESRCregIdx___IOMSTR_MSPI_N_Chip_Select_regIdx_DISP_control_signals_DE_CSX_and_CS[21:16];
            field {
                sw = rw;
            } NCEPOLregIdx___Polarity_select_for_NCE_for_GPIO_regIdx[22:22];
            field {
                sw = rw;
            } VDDPWRSWENregIdx___VDD_power_switch_enable[25:25];
            field {
                sw = rw;
            } FIENregIdx___Force_input_enable_active_regardless_of_function_selected[26:26];
            field {
                sw = rw;
            } FOENregIdx___Force_output_enable_active_regardless_of_function_selected[27:27];
        `endif

    } PinConfiguration0 [128]@ 0x0 += 4;
    reg {
        name="PadKey";
        regwidth=0x20;
            field {
                sw = rw;
            } PADKEY[31:0];
    } PadKey @ 0x200;
    reg {
        name="InputRead0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RDregIdx___Pin_regIdx_state[31:0];
    } InputRead0 [4]@ 0x204 += 4;
    reg {
        name="OutputWrite0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } WTregIdx___GPIO_Output_regIdx[31:0];
    } OutputWrite0 [4]@ 0x214 += 4;
    reg {
        name="OutputSet0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } WTSregIdx___GPIO_Output_Set_regIdx[31:0];
    } OutputSet0 [4]@ 0x224 += 4;
    reg {
        name="OutputClear0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } WTCregIdx___GPIO_Output_Clear_regIdx[31:0];
    } OutputClear0 [4]@ 0x234 += 4;
    reg {
        name="GPIOOutputEnable0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } ENregIdx___GPIO_Enable_regIdx[31:0];
    } GPIOOutputEnable0 [4]@ 0x244 += 4;
    reg {
        name="GPIOOutputEnableSet0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } ENSregIdx___GPIO_Enable_Set_regIdx[31:0];
    } GPIOOutputEnableSet0 [4]@ 0x254 += 4;
    reg {
        name="GPIOOutputEnableClear0";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } ENCregIdx___GPIO_Enable_Clear_regIdx[31:0];
    } GPIOOutputEnableClear0 [4]@ 0x264 += 4;
    reg {
        name="IOM0FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM0FlowControlIRQSelect @ 0x274;
    reg {
        name="IOM1FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM1FlowControlIRQSelect @ 0x278;
    reg {
        name="IOM2FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM2FlowControlIRQSelect @ 0x27c;
    reg {
        name="IOM3FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM3FlowControlIRQSelect @ 0x280;
    reg {
        name="IOM4FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM4FlowControlIRQSelect @ 0x284;
    reg {
        name="IOM5FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM5FlowControlIRQSelect @ 0x288;
    reg {
        name="IOM6FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM6FlowControlIRQSelect @ 0x28c;
    reg {
        name="IOM7FlowControlIRQSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IOM7FlowControlIRQSelect @ 0x290;
    reg {
        name="SDIFCDWPPadSelect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SDIFCDWPPadSelect @ 0x294;
    reg {
        name="ObservationModeSample";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ObservationModeSample @ 0x298;
    reg {
        name="InputEnableSignals0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputEnableSignals0 @ 0x29c;
    reg {
        name="InputEnableSignals1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputEnableSignals1 @ 0x2a0;
    reg {
        name="InputEnableSignals2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputEnableSignals2 @ 0x2a4;
    reg {
        name="InputEnableSignals3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputEnableSignals3 @ 0x2a8;
    reg {
        name="OutputEnableSignals0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OutputEnableSignals0 @ 0x2ac;
    reg {
        name="OutputEnableSignals1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OutputEnableSignals1 @ 0x2b0;
    reg {
        name="OutputEnableSignals2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OutputEnableSignals2 @ 0x2b4;
    reg {
        name="OutputEnableSignals3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OutputEnableSignals3 @ 0x2b8;
    reg {
        name="MCUPriorityN0InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptEnable0 @ 0x2c0;
    reg {
        name="MCUPriorityN0InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptStatus0 @ 0x2c4;
    reg {
        name="MCUPriorityN0InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptClear0 @ 0x2c8;
    reg {
        name="MCUPriorityN0InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptSet0 @ 0x2cc;
    reg {
        name="MCUPriorityN0InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptEnable1 @ 0x2d0;
    reg {
        name="MCUPriorityN0InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptStatus1 @ 0x2d4;
    reg {
        name="MCUPriorityN0InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptClear1 @ 0x2d8;
    reg {
        name="MCUPriorityN0InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptSet1 @ 0x2dc;
    reg {
        name="MCUPriorityN0InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptEnable2 @ 0x2e0;
    reg {
        name="MCUPriorityN0InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptStatus2 @ 0x2e4;
    reg {
        name="MCUPriorityN0InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptClear2 @ 0x2e8;
    reg {
        name="MCUPriorityN0InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptSet2 @ 0x2ec;
    reg {
        name="MCUPriorityN0InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptEnable3 @ 0x2f0;
    reg {
        name="MCUPriorityN0InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptStatus3 @ 0x2f4;
    reg {
        name="MCUPriorityN0InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptClear3 @ 0x2f8;
    reg {
        name="MCUPriorityN0InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN0InterruptSet3 @ 0x2fc;
    reg {
        name="MCUPriorityN1InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptEnable0 @ 0x300;
    reg {
        name="MCUPriorityN1InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptStatus0 @ 0x304;
    reg {
        name="MCUPriorityN1InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptClear0 @ 0x308;
    reg {
        name="MCUPriorityN1InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptSet0 @ 0x30c;
    reg {
        name="MCUPriorityN1InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptEnable1 @ 0x310;
    reg {
        name="MCUPriorityN1InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptStatus1 @ 0x314;
    reg {
        name="MCUPriorityN1InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptClear1 @ 0x318;
    reg {
        name="MCUPriorityN1InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptSet1 @ 0x31c;
    reg {
        name="MCUPriorityN1InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptEnable2 @ 0x320;
    reg {
        name="MCUPriorityN1InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptStatus2 @ 0x324;
    reg {
        name="MCUPriorityN1InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptClear2 @ 0x328;
    reg {
        name="MCUPriorityN1InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptSet2 @ 0x32c;
    reg {
        name="MCUPriorityN1InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptEnable3 @ 0x330;
    reg {
        name="MCUPriorityN1InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptStatus3 @ 0x334;
    reg {
        name="MCUPriorityN1InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptClear3 @ 0x338;
    reg {
        name="MCUPriorityN1InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MCUPriorityN1InterruptSet3 @ 0x33c;
    reg {
        name="DSP0PriorityN0InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptEnable0 @ 0x340;
    reg {
        name="DSP0PriorityN0InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptStatus0 @ 0x344;
    reg {
        name="DSP0PriorityN0InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptClear0 @ 0x348;
    reg {
        name="DSP0PriorityN0InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptSet0 @ 0x34c;
    reg {
        name="DSP0PriorityN0InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptEnable1 @ 0x350;
    reg {
        name="DSP0PriorityN0InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptStatus1 @ 0x354;
    reg {
        name="DSP0PriorityN0InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptClear1 @ 0x358;
    reg {
        name="DSP0PriorityN0InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptSet1 @ 0x35c;
    reg {
        name="DSP0PriorityN0InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptEnable2 @ 0x360;
    reg {
        name="DSP0PriorityN0InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptStatus2 @ 0x364;
    reg {
        name="DSP0PriorityN0InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptClear2 @ 0x368;
    reg {
        name="DSP0PriorityN0InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptSet2 @ 0x36c;
    reg {
        name="DSP0PriorityN0InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptEnable3 @ 0x370;
    reg {
        name="DSP0PriorityN0InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptStatus3 @ 0x374;
    reg {
        name="DSP0PriorityN0InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptClear3 @ 0x378;
    reg {
        name="DSP0PriorityN0InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN0InterruptSet3 @ 0x37c;
    reg {
        name="DSP0PriorityN1InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptEnable0 @ 0x380;
    reg {
        name="DSP0PriorityN1InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptStatus0 @ 0x384;
    reg {
        name="DSP0PriorityN1InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptClear0 @ 0x388;
    reg {
        name="DSP0PriorityN1InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptSet0 @ 0x38c;
    reg {
        name="DSP0PriorityN1InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptEnable1 @ 0x390;
    reg {
        name="DSP0PriorityN1InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptStatus1 @ 0x394;
    reg {
        name="DSP0PriorityN1InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptClear1 @ 0x398;
    reg {
        name="DSP0PriorityN1InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptSet1 @ 0x39c;
    reg {
        name="DSP0PriorityN1InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptEnable2 @ 0x3a0;
    reg {
        name="DSP0PriorityN1InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptStatus2 @ 0x3a4;
    reg {
        name="DSP0PriorityN1InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptClear2 @ 0x3a8;
    reg {
        name="DSP0PriorityN1InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptSet2 @ 0x3ac;
    reg {
        name="DSP0PriorityN1InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptEnable3 @ 0x3b0;
    reg {
        name="DSP0PriorityN1InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptStatus3 @ 0x3b4;
    reg {
        name="DSP0PriorityN1InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptClear3 @ 0x3b8;
    reg {
        name="DSP0PriorityN1InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0PriorityN1InterruptSet3 @ 0x3bc;
    reg {
        name="DSP1PriorityN0InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptEnable0 @ 0x3c0;
    reg {
        name="DSP1PriorityN0InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptStatus0 @ 0x3c4;
    reg {
        name="DSP1PriorityN0InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptClear0 @ 0x3c8;
    reg {
        name="DSP1PriorityN0InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptSet0 @ 0x3cc;
    reg {
        name="DSP1PriorityN0InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptEnable1 @ 0x3d0;
    reg {
        name="DSP1PriorityN0InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptStatus1 @ 0x3d4;
    reg {
        name="DSP1PriorityN0InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptClear1 @ 0x3d8;
    reg {
        name="DSP1PriorityN0InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptSet1 @ 0x3dc;
    reg {
        name="DSP1PriorityN0InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptEnable2 @ 0x3e0;
    reg {
        name="DSP1PriorityN0InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptStatus2 @ 0x3e4;
    reg {
        name="DSP1PriorityN0InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptClear2 @ 0x3e8;
    reg {
        name="DSP1PriorityN0InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptSet2 @ 0x3ec;
    reg {
        name="DSP1PriorityN0InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptEnable3 @ 0x3f0;
    reg {
        name="DSP1PriorityN0InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptStatus3 @ 0x3f4;
    reg {
        name="DSP1PriorityN0InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptClear3 @ 0x3f8;
    reg {
        name="DSP1PriorityN0InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN0InterruptSet3 @ 0x3fc;
    reg {
        name="DSP1PriorityN1InterruptEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptEnable0 @ 0x400;
    reg {
        name="DSP1PriorityN1InterruptStatus0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptStatus0 @ 0x404;
    reg {
        name="DSP1PriorityN1InterruptClear0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptClear0 @ 0x408;
    reg {
        name="DSP1PriorityN1InterruptSet0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptSet0 @ 0x40c;
    reg {
        name="DSP1PriorityN1InterruptEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptEnable1 @ 0x410;
    reg {
        name="DSP1PriorityN1InterruptStatus1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptStatus1 @ 0x414;
    reg {
        name="DSP1PriorityN1InterruptClear1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptClear1 @ 0x418;
    reg {
        name="DSP1PriorityN1InterruptSet1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptSet1 @ 0x41c;
    reg {
        name="DSP1PriorityN1InterruptEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptEnable2 @ 0x420;
    reg {
        name="DSP1PriorityN1InterruptStatus2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptStatus2 @ 0x424;
    reg {
        name="DSP1PriorityN1InterruptClear2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptClear2 @ 0x428;
    reg {
        name="DSP1PriorityN1InterruptSet2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptSet2 @ 0x42c;
    reg {
        name="DSP1PriorityN1InterruptEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptEnable3 @ 0x430;
    reg {
        name="DSP1PriorityN1InterruptStatus3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptStatus3 @ 0x434;
    reg {
        name="DSP1PriorityN1InterruptClear3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptClear3 @ 0x438;
    reg {
        name="DSP1PriorityN1InterruptSet3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1PriorityN1InterruptSet3 @ 0x43c;
} Registers_addrmap;


};