addrmap STM32H7_RCC {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="ClockControl";
        regwidth=0x20;
            field {
                sw = rw;
                reset=1'b1;
            } HSION[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
                reset=1'b1;
            } HSIKERON[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } HSIRDY[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSIDIV[4:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSIDIVF[5:5];
            field {
                sw = rw;
                reset=1'b1;
            } CSION[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } CSIRDY[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CSIKERON[9:9];
            field {
                sw = rw;
            } HSI48ON[12:12];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } HSI48RDY[13:13];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } D1CKRDY[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } D2CKRDY[15:15];
            field {
                sw = rw;
            } HSEON[16:16];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } HSERDY[17:17];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSEBYP[18:18];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSECSSON[19:19];
            field {
                sw = rw;
            } PLL1ON[24:24];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } PLL1RDY[25:25];
            field {
                sw = rw;
            } PLL2ON[26:26];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } PLL2RDY[27:27];
            field {
                sw = rw;
            } PLL3ON[28:28];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } PLL3RDY[29:29];
    } ClockControl @ 0x0;
    reg {
        name="InternalClockSourceCalibration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InternalClockSourceCalibration @ 0x4;
    reg {
        name="ClockConfiguration";
        regwidth=0x20;
            field {
                sw = rw;
            } SW[2:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } SWS[5:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } STOPWUCK[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } STOPKERWUCK[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RTCPRE[13:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HRTIMSEL[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TIMPRE[15:15];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MCO1PRE[21:18];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MCO1[24:22];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MCO2PRE[28:25];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MCO2[31:29];
    } ClockConfiguration @ 0x10;
    reg {
        name="PLLClockSourceSelect";
        regwidth=0x20;
            field {
                sw = rw;
            } PLLSRC[1:0];
            field {
                sw = rw;
                reset=6'b100000;
            } DIVM1[9:4];
            field {
                sw = rw;
                reset=6'b100000;
            } DIVM2[17:12];
            field {
                sw = rw;
                reset=6'b100000;
            } DIVM3[25:20];
    } PLLClockSourceSelect @ 0x28;
    reg {
        name="PLLConfigurationRegister";
        regwidth=0x20;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[31:0];
    } PLLConfigurationRegister @ 0x2c;
    reg {
        name="PLL1DividersConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL1DividersConfiguration @ 0x30;
    reg {
        name="PLL1FractionalDivider";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL1FractionalDivider @ 0x34;
    reg {
        name="PLL2DividersConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL2DividersConfiguration @ 0x38;
    reg {
        name="PLL2FractionalDivider";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL2FractionalDivider @ 0x3c;
    reg {
        name="PLL3DividersConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL3DividersConfiguration @ 0x40;
    reg {
        name="PLL3FractionalDivider";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PLL3FractionalDivider @ 0x44;
    reg {
        name="BackupDomainControl";
        regwidth=0x20;
            field {
                sw = rw;
            } LSEON[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LSERDY[1:1];
            field {
                sw = rw;
            } LSEBYP[2:2];
            field {
                sw = rw;
            } RTCSEL[9:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RTCEN[15:15];
            field {
                sw = rw;
            } BDRST[16:16];
    } BackupDomainControl @ 0x70;
    reg {
        name="ClockControlAndStatus";
        regwidth=0x20;
            field {
                sw = rw;
            } LSION[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LSIRDY[1:1];
    } ClockControlAndStatus @ 0x74;
    reg {
        name="AHB4Enable";
        regwidth=0x20;
            field {
                sw = rw;
            } GPIOAEN[0:0];
            field {
                sw = rw;
            } GPIOBEN[1:1];
            field {
                sw = rw;
            } GPIOCEN[2:2];
            field {
                sw = rw;
            } GPIODEN[3:3];
            field {
                sw = rw;
            } GPIOEEN[4:4];
            field {
                sw = rw;
            } GPIOFEN[5:5];
            field {
                sw = rw;
            } GPIOGEN[6:6];
            field {
                sw = rw;
            } GPIOHEN[7:7];
            field {
                sw = rw;
            } GPIOIEN[8:8];
            field {
                sw = rw;
            } GPIOJEN[9:9];
            field {
                sw = rw;
            } GPIOKEN[10:10];
            field {
                sw = rw;
            } CRCEN[19:19];
            field {
                sw = rw;
            } BDMAEN[21:21];
            field {
                sw = rw;
            } ADC3EN[24:24];
            field {
                sw = rw;
            } HSEMEN[25:25];
            field {
                sw = rw;
            } BKPRAMEN[28:28];
    } AHB4Enable @ 0xe0;
} Registers_addrmap;


};