addrmap NVIC {

/* Some conversion errors detected, this might mean that the peripheral's registers structure in this file is incomplete.
 * Please refer to logs and comments in the file for more information.
 * 
 * Register "FloatingPointDefaultStatusControl" overlaps another register at the same offset (0xf3c) and will be skipped, as it is illegal in SystemRDL.
 */

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="InterruptControllerType";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptControllerType @ 0x4;
    reg {
        name="SysTickControl";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
            } ENABLE[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
            } TICKINT[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } CLKSOURCE[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                onread = rclr;
            } COUNTFLAG[16:16];
    } SysTickControl @ 0x10;
    reg {
        name="SysTickReloadValue";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
            } RELOAD[23:0];
    } SysTickReloadValue @ 0x14;
    reg {
        name="SysTickValue";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } CURRENT[23:0];
    } SysTickValue @ 0x18;
    reg {
        name="SysTickCalibrationValue";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } TENMS[23:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } SKEW[30:30];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } NOREF[31:31];
    } SysTickCalibrationValue @ 0x1c;
    reg {
        name="SetEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SetEnable @ 0x100;
    reg {
        name="ClearEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClearEnable @ 0x180;
    reg {
        name="SetPending";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SetPending @ 0x200;
    reg {
        name="ClearPending";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClearPending @ 0x280;
    reg {
        name="ActiveBit";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ActiveBit @ 0x300;
    reg {
        name="InterruptTargetNonSecure";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptTargetNonSecure @ 0x380;
    reg {
        name="InterruptPriority";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptPriority @ 0x400;
    reg {
        name="CPUID";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CPUID @ 0xd00;
    reg {
        name="InterruptControlState";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } VECTACTIVE[8:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RETTOBASE[11:11];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } VECTPENDING[20:12];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ISRPENDING[22:22];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ISRPREEMPT[23:23];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } STTNS[24:24];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
                onwrite = woclr;
            } PENDSTCLR[25:25];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } PENDSTSET[26:26];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
                onwrite = woclr;
            } PENDSVCLR[27:27];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } PENDSVSET[28:28];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
                onwrite = woclr;
            } PENDNMICLR[30:30];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } PENDNMISET[31:31];
    } InterruptControlState @ 0xd04;
    reg {
        name="VectorTableOffset";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } VectorTableOffset @ 0xd08;
    reg {
        name="ApplicationInterruptAndReset";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VECTCLRACTIVE[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } SYSRESETREQ[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } SYSRESETREQS[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DIT[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } IESB[5:5];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } PRIGROUP[10:8];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } BFHFNMINS[13:13];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } PRIS[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ENDIANNESS[15:15];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } VECTKEYSTAT[31:16];
    } ApplicationInterruptAndReset @ 0xd0c;
    reg {
        name="SystemControlRegister";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } SLEEPONEXIT[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } SLEEPDEEP[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } SLEEPDEEPS[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
            } SEVONPEND[4:4];
    } SystemControlRegister @ 0xd10;
    reg {
        name="ConfigurationAndControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ConfigurationAndControl @ 0xd14;
    reg {
        name="SystemHandlerPriority1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemHandlerPriority1 @ 0xd18;
    reg {
        name="SystemHandlerPriority2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemHandlerPriority2 @ 0xd1c;
    reg {
        name="SystemHandlerPriority3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemHandlerPriority3 @ 0xd20;
    reg {
        name="SystemHandlerControlAndState";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MEMFAULTACT_Memory_Manage_Active[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } BUSFAULTACT_Bus_Fault_Active[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } USGFAULTACT_Usage_Fault_Active[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SVCALLACT_SV_Call_Active[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MONITORACT_Monitor_Active[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PENDSVACT_Pend_SV_Active[10:10];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SYSTICKACT_Sys_Tick_Active[11:11];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } USGFAULTPENDED_Usage_Fault_Pending[12:12];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MEMFAULTPENDED_Mem_Manage_Pending[13:13];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } BUSFAULTPENDED_Bus_Fault_Pending[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SVCALLPENDED_SV_Call_Pending[15:15];
            field {
                sw = rw;
            } MEMFAULTENA_Memory_Manage_Fault_Enable[16:16];
            field {
                sw = rw;
            } BUSFAULTENA_Bus_Fault_Enable[17:17];
            field {
                sw = rw;
            } USGFAULTENA_Usage_Fault_Enable[18:18];
    } SystemHandlerControlAndState @ 0xd24;
    reg {
        name="ConfigurableFaultStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ConfigurableFaultStatus @ 0xd28;
    reg {
        name="HardFaultStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VECTTBL[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } FORCED[30:30];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DEBUGEVT[31:31];
    } HardFaultStatus @ 0xd2c;
    reg {
        name="DebugFaultStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DebugFaultStatus @ 0xd30;
    reg {
        name="MemoryFaultAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryFaultAddress @ 0xd34;
    reg {
        name="BusFaultAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BusFaultAddress @ 0xd38;
    reg {
        name="AuxiliaryFaultStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AuxiliaryFaultStatus @ 0xd3c;
    reg {
        name="ProcessorFeature0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProcessorFeature0 @ 0xd40;
    reg {
        name="ProcessorFeature1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProcessorFeature1 @ 0xd44;
    reg {
        name="DebugFeature0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DebugFeature0 @ 0xd48;
    reg {
        name="AuxiliaryFeature0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AuxiliaryFeature0 @ 0xd4c;
    reg {
        name="MemoryModelFeature0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryModelFeature0 @ 0xd50;
    reg {
        name="MemoryModelFeature1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryModelFeature1 @ 0xd54;
    reg {
        name="MemoryModelFeature2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryModelFeature2 @ 0xd58;
    reg {
        name="MemoryModelFeature3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryModelFeature3 @ 0xd5c;
    reg {
        name="InstructionSetAttribute0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InstructionSetAttribute0 @ 0xd60;
    reg {
        name="InstructionSetAttribute1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InstructionSetAttribute1 @ 0xd64;
    reg {
        name="InstructionSetAttribute2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InstructionSetAttribute2 @ 0xd68;
    reg {
        name="InstructionSetAttribute3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InstructionSetAttribute3 @ 0xd6c;
    reg {
        name="InstructionSetAttribute4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InstructionSetAttribute4 @ 0xd70;
    reg {
        name="ID_ISAR5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ID_ISAR5 @ 0xd74;
    reg {
        name="CacheLevelID";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CacheLevelID @ 0xd78;
    reg {
        name="CacheType";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CacheType @ 0xd7c;
    reg {
        name="CacheSizeID";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } LineSize[2:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Associativity[12:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } NumSets[27:13];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } WA_Write_Allocation_Support[28:28];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RA_Read_Allocation_Support[29:29];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } WB_Write_Back_Support[30:30];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } WT_Write_Through_Support[31:31];
    } CacheSizeID @ 0xd80;
    reg {
        name="CacheSizeSelection";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } InD_Instruction_or_Data_Selection[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Level[3:1];
    } CacheSizeSelection @ 0xd84;
    reg {
        name="CoprocessorAccessControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CoprocessorAccessControl @ 0xd88;
    reg {
        name="MPUType";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MPUType @ 0xd90;
    reg {
        name="MPUControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MPUControl @ 0xd94;
    reg {
        name="MPURegionNumber";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MPURegionNumber @ 0xd98;
    reg {
        name="MPURegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MPURegionBaseAddress @ 0xd9c;
    reg {
        name="MPURegionAttributeAndSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MPURegionAttributeAndSize @ 0xda0;
    reg {
        name="Alias1OfMPURegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias1OfMPURegionBaseAddress @ 0xda4;
    reg {
        name="Alias1OfMPURegionAttributeAndSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias1OfMPURegionAttributeAndSize @ 0xda8;
    reg {
        name="Alias2OfMPURegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias2OfMPURegionBaseAddress @ 0xdac;
    reg {
        name="Alias2OfMPURegionAttributeAndSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias2OfMPURegionAttributeAndSize @ 0xdb0;
    reg {
        name="Alias3OfMPURegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias3OfMPURegionBaseAddress @ 0xdb4;
    reg {
        name="Alias3OfMPURegionAttributeAndSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Alias3OfMPURegionAttributeAndSize @ 0xdb8;
    reg {
        name="SAUControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SAUControl @ 0xdd0;
    reg {
        name="SAUType";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SAUType @ 0xdd4;
    reg {
        name="SAURegionNumber";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SAURegionNumber @ 0xdd8;
    reg {
        name="SAURegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SAURegionBaseAddress @ 0xddc;
    reg {
        name="SAURegionLimitAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SAURegionLimitAddress @ 0xde0;
    reg {
        name="SecureFaultStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } Status_bits[7:0];
    } SecureFaultStatus @ 0xde4;
    reg {
        name="SecureFaultAddress";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } Address[31:0];
    } SecureFaultAddress @ 0xde8;
    reg {
        name="DebugExceptionAndMonitorControlRegister";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_CORERESET_Reset_Vector_Catch[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_MMERR_Debug_trap_on_Memory_Management_faults[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_NOCPERR_Debug_trap_on_Usage_Fault_access_to_Coprocessor_which_is_not_present[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_CHKERR_Debug_trap_on_Usage_Fault_enabled_checking_errors[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_STATERR_Debug_trap_on_Usage_Fault_state_error[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_BUSERR_Debug_trap_on_normal_Bus_error[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_INTERR_Debug_trap_on_interrupt_exception_service_errors[9:9];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VC_HARDERR_Debug_trap_on_Hard_Fault[10:10];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MON_EN_Monitor_Enable[16:16];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MON_PEND_Monitor_Pend[17:17];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MON_STEP_Monitor_Step[18:18];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MON_REQ_Monitor_Request[19:19];
            field {
                sw = rw;
            } TRCENA_Trace_Enable[24:24];
    } DebugExceptionAndMonitorControlRegister @ 0xdfc;
    reg {
        name="SoftwareTriggerInterrupt";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareTriggerInterrupt @ 0xf00;
    reg {
        name="FPContextControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FPContextControl @ 0xf34;
    reg {
        name="FPContextAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FPContextAddress @ 0xf38;
    reg {
        name="FPDefaultStatusControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FPDefaultStatusControl @ 0xf3c;
    /* Conversion error: Register "FloatingPointDefaultStatusControl" overlaps another register at the same offset (0xf3c) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="FloatingPointDefaultStatusControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;

    } FloatingPointDefaultStatusControl @ 0xf3c;
    */
    reg {
        name="MediaAndFPFeature0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MediaAndFPFeature0 @ 0xf40;
    reg {
        name="MediaAndFPFeature1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MediaAndFPFeature1 @ 0xf44;
    reg {
        name="MediaAndFPFeature2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MediaAndFPFeature2 @ 0xf48;
    reg {
        name="ICacheInvalidateAllToPoUaIgnored";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ICacheInvalidateAllToPoUaIgnored @ 0xf50;
    reg {
        name="ICacheInvalidateByMVAToPoUaAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ICacheInvalidateByMVAToPoUaAddress @ 0xf58;
    reg {
        name="DCacheInvalidateByMVAToPoCAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheInvalidateByMVAToPoCAddress @ 0xf5c;
    reg {
        name="DCacheInvalidateBySetWay";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheInvalidateBySetWay @ 0xf60;
    reg {
        name="DCacheCleanByMVAToPoUAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheCleanByMVAToPoUAddress @ 0xf64;
    reg {
        name="DCacheCleanByMVAToPoCAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheCleanByMVAToPoCAddress @ 0xf68;
    reg {
        name="DCacheCleanBySetWay";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheCleanBySetWay @ 0xf6c;
    reg {
        name="DCacheCleanAndInvalidateByMVAToPoCAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheCleanAndInvalidateByMVAToPoCAddress @ 0xf70;
    reg {
        name="DCacheCleanAndInvalidateBySetWay";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DCacheCleanAndInvalidateBySetWay @ 0xf74;
    reg {
        name="BranchPredictorInvalidateAllIgnored";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BranchPredictorInvalidateAllIgnored @ 0xf78;
    reg {
        name="InstructionTightlyCoupledMemoryControl";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EN_TCM_Enable[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RMW_Read_Modify_Write_Enable[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RETEN_Retry_Phase_Enable[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SZ_TCM_Size[6:3];
    } InstructionTightlyCoupledMemoryControl [2]@ 0xf90 += 4;
    reg {
        name="AHBPControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AHBPControl @ 0xf98;
    reg {
        name="L1CacheControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } L1CacheControl @ 0xf9c;
    reg {
        name="AHBSlaveControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AHBSlaveControl @ 0xfa0;
    reg {
        name="AuxiliaryBusFaultStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AuxiliaryBusFaultStatus @ 0xfa8;
} Registers_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Type";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Type @ 0x0;
    reg {
        name="Control";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control @ 0x4;
    reg {
        name="RegionNumber";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionNumber @ 0x8;
    reg {
        name="RegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddress @ 0xc;
    reg {
        name="RegionAttributeAndSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionAttributeAndSize @ 0x10;
    reg {
        name="RegionBaseAddressAlias1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressAlias1 @ 0x14;
    reg {
        name="RegionAttributeAndSizeAlias1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionAttributeAndSizeAlias1 @ 0x18;
    reg {
        name="RegionBaseAddressAlias2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressAlias2 @ 0x1c;
    reg {
        name="RegionAttributeAndSizeAlias2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionAttributeAndSizeAlias2 @ 0x20;
    reg {
        name="RegionBaseAddressAlias3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressAlias3 @ 0x24;
    reg {
        name="RegionAttributeAndSizeAlias3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionAttributeAndSizeAlias3 @ 0x28;
} RegistersV7_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Type";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Type @ 0x0;
    reg {
        name="Control";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control @ 0x4;
    reg {
        name="RegionNumberRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionNumberRegister @ 0x8;
    reg {
        name="RegionBaseAddressRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressRegister @ 0xc;
    reg {
        name="RegionLimitAddressRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionLimitAddressRegister @ 0x10;
    reg {
        name="RegionBaseAddressRegisterAlias1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressRegisterAlias1 @ 0x14;
    reg {
        name="RegionLimitAddressRegisterAlias1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionLimitAddressRegisterAlias1 @ 0x18;
    reg {
        name="RegionBaseAddressRegisterAlias2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressRegisterAlias2 @ 0x1c;
    reg {
        name="RegionLimitAddressRegisterAlias2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionLimitAddressRegisterAlias2 @ 0x20;
    reg {
        name="RegionBaseAddressRegisterAlias3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddressRegisterAlias3 @ 0x24;
    reg {
        name="RegionLimitAddressRegisterAlias3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionLimitAddressRegisterAlias3 @ 0x28;
    reg {
        name="MemoryAttributeIndirectionRegister0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryAttributeIndirectionRegister0 @ 0x30;
    reg {
        name="MemoryAttributeIndirectionRegister1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryAttributeIndirectionRegister1 @ 0x34;
} RegistersV8_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Control";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control @ 0x0;
    reg {
        name="Type";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Type @ 0x4;
    reg {
        name="RegionNumber";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionNumber @ 0x8;
    reg {
        name="RegionBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAddress @ 0xc;
    reg {
        name="RegionLimitAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionLimitAddress @ 0x10;
} RegistersSAU_addrmap;


};