addrmap EFR32xG2_GPCRC {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Ipversion";
        regwidth=0x20;
            field {
                sw = r;
            } No_name_1[31:0];
    } Ipversion @ 0x0;
    reg {
        name="Enable";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
            } EN[0:0];
    } Enable @ 0x4;
    reg {
        name="Control";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } POLYSEL[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } BYTEMODE[8:8];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } BITREVERSE[9:9];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } BYTEREVERSE[10:10];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } AUTOINIT[13:13];
    } Control @ 0x8;
    reg {
        name="Command";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } INIT[0:0];
    } Command @ 0xc;
    reg {
        name="Init";
        regwidth=0x20;
            field {
                sw = rw;
            } INIT[31:0];
    } Init @ 0x10;
    reg {
        name="Poly";
        regwidth=0x20;
            field {
                sw = rw;
            } POLY[15:0];
    } Poly @ 0x14;
    reg {
        name="InputData";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } INPUTDATA[31:0];
    } InputData @ 0x18;
    reg {
        name="InputDataHWord";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } INPUTDATAHWORD[15:0];
    } InputDataHWord @ 0x1c;
    reg {
        name="InputDataByte";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } INPUTDATABYTE[7:0];
    } InputDataByte @ 0x20;
    reg {
        name="Data";
        desc = "This register has the following custom Renode callbacks: Read";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } DATA[31:0];
    } Data @ 0x24;
    reg {
        name="DataRev";
        desc = "This register has the following custom Renode callbacks: Read";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } DATAREV[31:0];
    } DataRev @ 0x28;
    reg {
        name="DataByteRev";
        desc = "This register has the following custom Renode callbacks: Read";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } DATABYTEREV[31:0];
    } DataByteRev @ 0x2c;
    reg {
        name="Ipversion_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Ipversion_Set @ 0x1000;
    reg {
        name="Enable_Set";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } EN_SET[0:0];
    } Enable_Set @ 0x1004;
    reg {
        name="Control_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control_Set @ 0x1008;
    reg {
        name="Command_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Set @ 0x100c;
    reg {
        name="Init_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Init_Set @ 0x1010;
    reg {
        name="Poly_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Poly_Set @ 0x1014;
    reg {
        name="InputData_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputData_Set @ 0x1018;
    reg {
        name="InputDataHWord_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataHWord_Set @ 0x101c;
    reg {
        name="InputDataByte_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataByte_Set @ 0x1020;
    reg {
        name="Data_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Data_Set @ 0x1024;
    reg {
        name="DataRev_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRev_Set @ 0x1028;
    reg {
        name="DataByteRev_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataByteRev_Set @ 0x102c;
    reg {
        name="Ipversion_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Ipversion_Clr @ 0x2000;
    reg {
        name="Enable_Clr";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } EN_Clr[0:0];
    } Enable_Clr @ 0x2004;
    reg {
        name="Control_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control_Clr @ 0x2008;
    reg {
        name="Command_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Clr @ 0x200c;
    reg {
        name="Init_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Init_Clr @ 0x2010;
    reg {
        name="Poly_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Poly_Clr @ 0x2014;
    reg {
        name="InputData_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputData_Clr @ 0x2018;
    reg {
        name="InputDataHWord_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataHWord_Clr @ 0x201c;
    reg {
        name="InputDataByte_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataByte_Clr @ 0x2020;
    reg {
        name="Data_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Data_Clr @ 0x2024;
    reg {
        name="DataRev_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRev_Clr @ 0x2028;
    reg {
        name="DataByteRev_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataByteRev_Clr @ 0x202c;
    reg {
        name="Ipversion_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Ipversion_Tgl @ 0x3000;
    reg {
        name="Enable_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Enable_Tgl @ 0x3004;
    reg {
        name="Control_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Control_Tgl @ 0x3008;
    reg {
        name="Command_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Tgl @ 0x300c;
    reg {
        name="Init_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Init_Tgl @ 0x3010;
    reg {
        name="Poly_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Poly_Tgl @ 0x3014;
    reg {
        name="InputData_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputData_Tgl @ 0x3018;
    reg {
        name="InputDataHWord_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataHWord_Tgl @ 0x301c;
    reg {
        name="InputDataByte_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputDataByte_Tgl @ 0x3020;
    reg {
        name="Data_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Data_Tgl @ 0x3024;
    reg {
        name="DataRev_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataRev_Tgl @ 0x3028;
    reg {
        name="DataByteRev_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DataByteRev_Tgl @ 0x302c;
} Registers_addrmap;


};