addrmap S32K3XX_FlexIO {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="VersionID";
        regwidth=0x20;
            field {
                sw = r;
                reset=8'b10;
            } MAJOR_Major_Version[31:24];
            field {
                sw = r;
                reset=8'b1;
            } MINOR_Minor_Version[23:16];
            field {
                sw = r;
                reset=16'b11;
            } FEATURE_Feature_Specification[15:0];
    } VersionID @ 0x0;
    reg {
        name="Parameter";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
                reset=8'b100;
            } TRIGGER_Trigger_Number[31:24];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } PIN_Pin_Number[23:16];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } TIMER_Timer_Number[15:8];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } SHIFTER_Shifter_Number[7:0];
    } Parameter @ 0x4;
    reg {
        name="Control";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DBGE_Debug_Enable[30:30];
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } SWRSRT_Software_Reset[1:1];
            field {
                sw = rw;
            } FLEXEN_Enable[0:0];
    } Control @ 0x8;
    reg {
        name="PinState";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PDI_Pin_Data_Input[31:0];
    } PinState @ 0xc;
    reg {
        name="ShifterStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterStatus @ 0x10;
    reg {
        name="ShifterError";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterError @ 0x14;
    reg {
        name="TimerStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerStatus @ 0x18;
    reg {
        name="ShifterStatusInterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterStatusInterruptEnable @ 0x20;
    reg {
        name="ShifterErrorInterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterErrorInterruptEnable @ 0x24;
    reg {
        name="TimerInterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerInterruptEnable @ 0x28;
    reg {
        name="ShifterStatusDMAEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterStatusDMAEnable @ 0x30;
    reg {
        name="TimerStatusDMAEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TSDE_Timer_Status_DMA_Enable[7:0];
    } TimerStatusDMAEnable @ 0x38;
    reg {
        name="ShifterState";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } STATE_Current_State_Pointer[2:0];
    } ShifterState @ 0x40;
    reg {
        name="TriggerStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ETSF_External_Trigger_Status_Flag[3:0];
    } TriggerStatus @ 0x48;
    reg {
        name="ExternalTriggerInterruptEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TRIE_External_Trigger_Interrupt_Enable[3:0];
    } ExternalTriggerInterruptEnable @ 0x4c;
    reg {
        name="PinStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PSF_Pin_Status_Flag[31:0];
    } PinStatus @ 0x50;
    reg {
        name="PinInterruptEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PSIE_Pin_Status_Interrupt_Enable[31:0];
    } PinInterruptEnable @ 0x54;
    reg {
        name="PinRisingEdgeEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PRE_Pin_Rising_Edge[31:0];
    } PinRisingEdgeEnable @ 0x58;
    reg {
        name="PinFallingEdgeEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PFE_Pin_Falling_Edge[31:0];
    } PinFallingEdgeEnable @ 0x5c;
    reg {
        name="PinOutputData";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTD_Output_Data[31:0];
    } PinOutputData @ 0x60;
    reg {
        name="PinOutputEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTE_Output_Enable[31:0];
    } PinOutputEnable @ 0x64;
    reg {
        name="PinOutputDisable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTDIS_Output_Disable[31:0];
    } PinOutputDisable @ 0x68;
    reg {
        name="PinOutputClear";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTCLR_Output_Clear[31:0];
    } PinOutputClear @ 0x6c;
    reg {
        name="PinOutputSet";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTSET_Output_Set[31:0];
    } PinOutputSet @ 0x70;
    reg {
        name="PinOutputToggle";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OUTTOG_Output_Toggle[31:0];
    } PinOutputToggle @ 0x74;
    reg {
        name="ShifterControl0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterControl0 @ 0x80;
    reg {
        name="ShifterControl7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterControl7 @ 0x9c;
    reg {
        name="ShifterConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterConfiguration0 @ 0x100;
    reg {
        name="ShifterConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterConfiguration7 @ 0x11c;
    reg {
        name="ShifterBuffer0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0 @ 0x200;
    reg {
        name="ShifterBuffer7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7 @ 0x21c;
    reg {
        name="ShifterBuffer0BitSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0BitSwapped @ 0x280;
    reg {
        name="ShifterBuffer7BitSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7BitSwapped @ 0x29c;
    reg {
        name="ShifterBuffer0ByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0ByteSwapped @ 0x300;
    reg {
        name="ShifterBuffer7ByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7ByteSwapped @ 0x31c;
    reg {
        name="ShifterBuffer0BitByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0BitByteSwapped @ 0x380;
    reg {
        name="ShifterBuffer7BitByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7BitByteSwapped @ 0x39c;
    reg {
        name="TimerControl0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerControl0 @ 0x400;
    reg {
        name="TimerControl7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerControl7 @ 0x41c;
    reg {
        name="TimerConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerConfiguration0 @ 0x480;
    reg {
        name="TimerConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerConfiguration7 @ 0x49c;
    reg {
        name="TimerCompare0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerCompare0 @ 0x500;
    reg {
        name="TimerCompare7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimerCompare7 @ 0x51c;
    reg {
        name="ShifterBuffer0NibbleByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0NibbleByteSwapped @ 0x680;
    reg {
        name="ShifterBuffer7NibbleByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7NibbleByteSwapped @ 0x69c;
    reg {
        name="ShifterBuffer0HalfwordSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0HalfwordSwapped @ 0x700;
    reg {
        name="ShifterBuffer7HalfwordSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7HalfwordSwapped @ 0x71c;
    reg {
        name="ShifterBuffer0NibbleSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0NibbleSwapped @ 0x780;
    reg {
        name="ShifterBuffer7NibbleSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7NibbleSwapped @ 0x79c;
    reg {
        name="ShifterBuffer0OddEvenSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0OddEvenSwapped @ 0x800;
    reg {
        name="ShifterBuffer7OddEvenSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7OddEvenSwapped @ 0x81c;
    reg {
        name="ShifterBuffer0EvenOddSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0EvenOddSwapped @ 0x880;
    reg {
        name="ShifterBuffer7EvenOddSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7EvenOddSwapped @ 0x89c;
    reg {
        name="ShifterBuffer0HalfWordByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer0HalfWordByteSwapped @ 0x900;
    reg {
        name="ShifterBuffer7HalfwordByteSwapped";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ShifterBuffer7HalfwordByteSwapped @ 0x91c;
} Registers_addrmap;


};