addrmap EFR32xG2_MSC_3 {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="IpVersion";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion @ 0x0;
    reg {
        name="ReadControl";
        regwidth=0x20;
            field {
                sw = rw;
            } MODE[21:20];
    } ReadControl @ 0x4;
    reg {
        name="ReadDataControl";
        regwidth=0x20;
            field {
                sw = rw;
            } AFDIS[1:1];
            field {
                sw = rw;
            } DOUTBUFEN[12:12];
    } ReadDataControl @ 0x8;
    reg {
        name="WriteControl";
        regwidth=0x20;
            field {
                sw = rw;
            } WREN[0:0];
            field {
                sw = rw;
            } IRQERASEABORT[1:1];
            field {
                sw = rw;
            } LPWRITE[3:3];
            field {
                sw = rw;
            } RANGECOUNT[25:16];
    } WriteControl @ 0xc;
    reg {
        name="WriteCommand";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } ERASEPAGE[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } WRITEEND[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } ERASERANGE[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } ERASEABORT[5:5];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } ERASEABORT_[8:8];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } CLEARWDATA[12:12];
    } WriteCommand @ 0x10;
    reg {
        name="PageEraseOrWriteAddress";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } ADDRB[31:0];
    } PageEraseOrWriteAddress @ 0x14;
    reg {
        name="WriteData";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } DATAW[31:0];
    } WriteData @ 0x18;
    reg {
        name="Status";
        regwidth=0x20;
            field {
                sw = r;
            } BUSY[0:0];
            field {
                sw = r;
            } LOCKED[1:1];
            field {
                sw = r;
            } INVADDR[2:2];
            field {
                sw = r;
                reset=1'b1;
            } WDATAREADY[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } The_Current_Flash_Erase_Operation_was_aborted_by_interrupt_ERASEABORTED[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Write_command_is_in_queue_PENDING[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Write_command_timeout_flag_TIMEOUT[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EraseRange_with_skipped_locked_pages_RANGEPARTIAL[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Register_Lock_Status_REGLOCK[16:16];
            field {
                sw = r;
            } PWRON[24:24];
            field {
                sw = r;
                reset=1'b1;
            } WREADY[27:27];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } Flash_power_up_checkerboard_pattern_check_fail_count_PWRUPCKBDFAILCOUNT[31:28];
    } Status @ 0x1c;
    reg {
        name="InterruptFlags";
        regwidth=0x20;
            field {
                sw = rw;
            } ERASEIF[0:0];
            field {
                sw = rw;
            } WRITEIF[1:1];
            field {
                sw = rw;
            } WDATAOVIF[2:2];
            field {
                sw = rw;
            } PWRUPFIF[8:8];
            field {
                sw = rw;
            } PWROFFIF[9:9];
    } InterruptFlags @ 0x20;
    reg {
        name="InterruptEnable";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } ERASEIEN[0:0];
            field {
                sw = rw;
            } WRITEIEN[1:1];
            field {
                sw = rw;
            } WDATAOVIEN[2:2];
            field {
                sw = rw;
            } PWRUPFIEN[8:8];
            field {
                sw = rw;
            } PWROFFIEN[9:9];
    } InterruptEnable @ 0x24;
    reg {
        name="UserDataSize";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } UserDataSize @ 0x34;
    reg {
        name="Command";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } PWRUP[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } PWROFF[4:4];
    } Command @ 0x38;
    reg {
        name="LockConfig";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } LOCKKEY[15:0];
    } LockConfig @ 0x3c;
    reg {
        name="LockWord";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LockWord @ 0x40;
    reg {
        name="PowerControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerControl @ 0x50;
    reg {
        name="PageLock0";
        regwidth=0x20;
            field {
                sw = rw;
            } PAGELOCK0[21:0];
    } PageLock0 @ 0x120;
    reg {
        name="PageLock1";
        regwidth=0x20;
            field {
                sw = rw;
            } PAGELOCK1[21:0];
    } PageLock1 @ 0x124;
    reg {
        name="IpVersion_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Set @ 0x1000;
    reg {
        name="ReadControl_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadControl_Set @ 0x1004;
    reg {
        name="ReadDataControl_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadDataControl_Set @ 0x1008;
    reg {
        name="WriteControl_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteControl_Set @ 0x100c;
    reg {
        name="WriteCommand_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteCommand_Set @ 0x1010;
    reg {
        name="PageEraseOrWriteAddress_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageEraseOrWriteAddress_Set @ 0x1014;
    reg {
        name="WriteData_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteData_Set @ 0x1018;
    reg {
        name="Status_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Set @ 0x101c;
    reg {
        name="InterruptFlags_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptFlags_Set @ 0x1020;
    reg {
        name="InterruptEnable_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptEnable_Set @ 0x1024;
    reg {
        name="UserDataSize_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } UserDataSize_Set @ 0x1034;
    reg {
        name="Command_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Set @ 0x1038;
    reg {
        name="ConfigLock_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ConfigLock_Set @ 0x103c;
    reg {
        name="LockWord_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LockWord_Set @ 0x1040;
    reg {
        name="PowerControl_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerControl_Set @ 0x1050;
    reg {
        name="PageLock0_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock0_Set @ 0x1120;
    reg {
        name="PageLock1_Set";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock1_Set @ 0x1124;
    reg {
        name="IpVersion_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Clr @ 0x2000;
    reg {
        name="ReadControl_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadControl_Clr @ 0x2004;
    reg {
        name="ReadDataControl_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadDataControl_Clr @ 0x2008;
    reg {
        name="WriteControl_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteControl_Clr @ 0x200c;
    reg {
        name="WriteCommand_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteCommand_Clr @ 0x2010;
    reg {
        name="PageEraseOrWriteAddress_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageEraseOrWriteAddress_Clr @ 0x2014;
    reg {
        name="WriteData_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteData_Clr @ 0x2018;
    reg {
        name="Status_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Clr @ 0x201c;
    reg {
        name="InterruptFlags_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptFlags_Clr @ 0x2020;
    reg {
        name="InterruptEnable_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptEnable_Clr @ 0x2024;
    reg {
        name="UserDataSize_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } UserDataSize_Clr @ 0x2034;
    reg {
        name="Command_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Clr @ 0x2038;
    reg {
        name="ConfigLock_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ConfigLock_Clr @ 0x203c;
    reg {
        name="LockWord_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LockWord_Clr @ 0x2040;
    reg {
        name="PowerControl_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerControl_Clr @ 0x2050;
    reg {
        name="PageLock0_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock0_Clr @ 0x2120;
    reg {
        name="PageLock1_Clr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock1_Clr @ 0x2124;
    reg {
        name="IpVersion_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IpVersion_Tgl @ 0x3000;
    reg {
        name="ReadControl_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadControl_Tgl @ 0x3004;
    reg {
        name="ReadDataControl_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadDataControl_Tgl @ 0x3008;
    reg {
        name="WriteControl_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteControl_Tgl @ 0x300c;
    reg {
        name="WriteCommand_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteCommand_Tgl @ 0x3010;
    reg {
        name="PageEraseOrWriteAddress_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageEraseOrWriteAddress_Tgl @ 0x3014;
    reg {
        name="WriteData_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteData_Tgl @ 0x3018;
    reg {
        name="Status_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Status_Tgl @ 0x301c;
    reg {
        name="InterruptFlags_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptFlags_Tgl @ 0x3020;
    reg {
        name="InterruptEnable_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptEnable_Tgl @ 0x3024;
    reg {
        name="UserDataSize_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } UserDataSize_Tgl @ 0x3034;
    reg {
        name="Command_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Command_Tgl @ 0x3038;
    reg {
        name="LockConfig_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LockConfig_Tgl @ 0x303c;
    reg {
        name="LockWord_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LockWord_Tgl @ 0x3040;
    reg {
        name="PowerControl_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerControl_Tgl @ 0x3050;
    reg {
        name="PageLock0_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock0_Tgl @ 0x3120;
    reg {
        name="PageLock1_Tgl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PageLock1_Tgl @ 0x3124;
} Registers_addrmap;


};