addrmap Cadence_USB {

/* Some conversion errors detected, this might mean that the peripheral's registers structure in this file is incomplete.
 * Please refer to logs and comments in the file for more information.
 * 
 * Register "conf" overlaps another register at the same offset (0x400) and will be skipped, as it is illegal in SystemRDL.
 * Register "sts" overlaps another register at the same offset (0x404) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_sel" overlaps another register at the same offset (0x41c) and will be skipped, as it is illegal in SystemRDL.
 * Register "traddr" overlaps another register at the same offset (0x420) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_cfg" overlaps another register at the same offset (0x424) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_cmd" overlaps another register at the same offset (0x428) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_sts" overlaps another register at the same offset (0x42c) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_sts_sid" overlaps another register at the same offset (0x430) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_sts_en" overlaps another register at the same offset (0x434) and will be skipped, as it is illegal in SystemRDL.
 * Register "drbl" overlaps another register at the same offset (0x438) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_ien" overlaps another register at the same offset (0x43c) and will be skipped, as it is illegal in SystemRDL.
 * Register "ep_ists" overlaps another register at the same offset (0x440) and will be skipped, as it is illegal in SystemRDL.
 */

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="conf";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_RESET[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_LENDIAN[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_BENDIAN[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_SWRST[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_DSING[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_DMULT[9:9];
    } conf @ 0x400;
    /* Conversion error: Register "conf" overlaps another register at the same offset (0x400) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="conf";
        regwidth=0x20;

    } conf @ 0x400;
    */
    reg {
        name="sts";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_DTRANS[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_ENDIAN[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_ENDIAN2[31:31];
    } sts @ 0x404;
    /* Conversion error: Register "sts" overlaps another register at the same offset (0x404) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="sts";
        regwidth=0x20;

    } sts @ 0x404;
    */
    reg {
        name="ep_sel";
        regwidth=0x20;
            field {
                sw = rw;
            } DMARM_EP_NUM[3:0];
            field {
                sw = rw;
            } DMARM_EP_DIR[7:7];
    } ep_sel @ 0x41c;
    /* Conversion error: Register "ep_sel" overlaps another register at the same offset (0x41c) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_sel";
        regwidth=0x20;

    } ep_sel @ 0x41c;
    */
    reg {
        name="traddr";
        regwidth=0x20;
            field {
                sw = rw;
            } DMARM_EP_TRADDR[31:0];
    } traddr @ 0x420;
    /* Conversion error: Register "traddr" overlaps another register at the same offset (0x420) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="traddr";
        regwidth=0x20;

    } traddr @ 0x420;
    */
    reg {
        name="ep_cfg";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_ENABLE[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_ENDIAN[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DSING[12:12];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DMULT[13:13];
    } ep_cfg @ 0x424;
    /* Conversion error: Register "ep_cfg" overlaps another register at the same offset (0x424) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_cfg";
        regwidth=0x20;

    } ep_cfg @ 0x424;
    */
    reg {
        name="ep_cmd";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_EPRST[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } DMARF_EP_DRDY[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DFLUSH[7:7];
    } ep_cmd @ 0x428;
    /* Conversion error: Register "ep_cmd" overlaps another register at the same offset (0x428) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_cmd";
        regwidth=0x20;

    } ep_cmd @ 0x428;
    */
    reg {
        name="ep_sts";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
                onwrite = woclr;
            } DMARF_EP_IOC[2:2];
            field {
                sw = rw;
                onwrite = woclr;
            } DMARF_EP_ISP[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DESCMIS[4:4];
            field {
                sw = rw;
            } DMARF_EP_TRBERR[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DBUSY[9:9];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_CCS[11:11];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_OUTSMM[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_ISOERR[15:15];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DTRANS[31:31];
    } ep_sts @ 0x42c;
    /* Conversion error: Register "ep_sts" overlaps another register at the same offset (0x42c) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_sts";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;

    } ep_sts @ 0x42c;
    */
    reg {
        name="ep_sts_sid";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_STS_SID[15:0];
    } ep_sts_sid @ 0x430;
    /* Conversion error: Register "ep_sts_sid" overlaps another register at the same offset (0x430) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_sts_sid";
        regwidth=0x20;

    } ep_sts_sid @ 0x430;
    */
    reg {
        name="ep_sts_en";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_DESCMISEN[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_TRBERREN[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_OUTSMMEN[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARF_EP_ISOERREN[15:15];
    } ep_sts_en @ 0x434;
    /* Conversion error: Register "ep_sts_en" overlaps another register at the same offset (0x434) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_sts_en";
        regwidth=0x20;

    } ep_sts_en @ 0x434;
    */
    reg {
        name="drbl";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARD_DRBL[31:0];
    } drbl @ 0x438;
    /* Conversion error: Register "drbl" overlaps another register at the same offset (0x438) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="drbl";
        regwidth=0x20;

    } drbl @ 0x438;
    */
    reg {
        name="ep_ien";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DMARD_EP_INTERRUPT_EN[31:0];
    } ep_ien @ 0x43c;
    /* Conversion error: Register "ep_ien" overlaps another register at the same offset (0x43c) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_ien";
        regwidth=0x20;

    } ep_ien @ 0x43c;
    */
    reg {
        name="ep_ists";
        regwidth=0x20;
            field {
                sw = rw;
            } DMARF_EP_ISTS[30:0];
    } ep_ists @ 0x440;
    /* Conversion error: Register "ep_ists" overlaps another register at the same offset (0x440) and will be skipped, as it is illegal in SystemRDL.
    reg {
        name="ep_ists";
        regwidth=0x20;

    } ep_ists @ 0x440;
    */
} DMARegisters_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="rxbc";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxbc @ 0x0;
    reg {
        name="rxcon";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxcon @ 0x2;
    reg {
        name="rxcs";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxcs @ 0x3;
    reg {
        name="txbc";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txbc @ 0x4;
    reg {
        name="txcon";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txcon @ 0x6;
    reg {
        name="txcs";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txcs @ 0x7;
} EndpointRegisterFields_addrmap;
addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="ep0Rxbc";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0Rxbc @ 0x0;
    reg {
        name="ep0Txbc";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0Txbc @ 0x1;
    reg {
        name="ep0cs";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } STALL[0:0];
            field {
                sw = rw;
            } HSNAK[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TXBSY[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXBSY[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DSTALL[4:4];
            field {
                sw = rw;
                onwrite = woclr;
            } CHGSET[7:7];
    } ep0cs @ 0x2;
    reg {
        name="lpmctrll";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } lpmctrll @ 0x4;
    reg {
        name="lpmctrlh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } lpmctrlh @ 0x5;
    reg {
        name="lpmclock";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } lpmclock @ 0x6;
    reg {
        name="ep0fifoctrl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0fifoctrl @ 0x7;
    reg {
        name="epBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } epBase @ 0x8;
    reg {
        name="fifodatBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } fifodatBase @ 0x84;
    reg {
        name="ep0datatx";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0datatx @ 0x100;
    reg {
        name="ep0datarx";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0datarx @ 0x140;
    reg {
        name="setupdat";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } setupdat @ 0x180;
    reg {
        name="txirq";
        regwidth=0x10;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[15:0];
    } txirq @ 0x188;
    reg {
        name="rxirq";
        regwidth=0x10;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[15:0];
    } rxirq @ 0x18a;
    reg {
        name="usbirq";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
                onwrite = woclr;
            } SUDAV[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SOF[1:1];
            field {
                sw = rw;
                onwrite = woclr;
            } SUTOK[2:2];
            field {
                sw = rw;
                onwrite = woclr;
            } SUSP[3:3];
            field {
                sw = rw;
                onwrite = woclr;
            } URES[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSPPED[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } LPMIR[7:7];
    } usbirq @ 0x18c;
    reg {
        name="wkirq";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
                onwrite = woclr;
            } No_name_1[7:7];
    } wkirq @ 0x18d;
    reg {
        name="rxpngirq";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxpngirq @ 0x18e;
    reg {
        name="txfullirq";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txfullirq @ 0x190;
    reg {
        name="rxemptirq";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxemptirq @ 0x192;
    reg {
        name="txien";
        regwidth=0x10;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[15:0];
    } txien @ 0x194;
    reg {
        name="rxien";
        regwidth=0x10;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[15:0];
    } rxien @ 0x196;
    reg {
        name="usbien";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
            } SUDAVIE[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SOFIE[1:1];
            field {
                sw = rw;
            } SUTOKIE[2:2];
            field {
                sw = rw;
            } SUSPIE[3:3];
            field {
                sw = rw;
            } URESIE[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } HSPIE[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } LPMIE[7:7];
    } usbien @ 0x198;
    reg {
        name="extien";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } extien @ 0x199;
    reg {
        name="rxpngien";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxpngien @ 0x19a;
    reg {
        name="txfullien";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txfullien @ 0x19c;
    reg {
        name="rxemptien";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxemptien @ 0x19e;
    reg {
        name="usbivect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } usbivect @ 0x1a0;
    reg {
        name="fifoivect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } fifoivect @ 0x1a1;
    reg {
        name="endprst";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } endprst @ 0x1a2;
    reg {
        name="usbcs";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } usbcs @ 0x1a3;
    reg {
        name="frmnr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } frmnr @ 0x1a4;
    reg {
        name="fnaddr";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } fnaddr @ 0x1a6;
    reg {
        name="clkgate";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } clkgate @ 0x1a7;
    reg {
        name="fifoctrl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } fifoctrl @ 0x1a8;
    reg {
        name="speedctrl";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } SPEEDCTRL_LS[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } SPEEDCTRL_FS[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } SPEEDCTRL_HS[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } SPEEDCTRL_HSDISABLE[7:7];
    } speedctrl @ 0x1a9;
    reg {
        name="isoautoarm";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } isoautoarm @ 0x1cc;
    reg {
        name="adpbc1ien";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc1ien @ 0x1ce;
    reg {
        name="adpbc2ien";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc2ien @ 0x1cf;
    reg {
        name="adpbcctr0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbcctr0 @ 0x1d0;
    reg {
        name="adpbcctr1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbcctr1 @ 0x1d1;
    reg {
        name="adpbcctr2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbcctr2 @ 0x1d2;
    reg {
        name="adpbc1irq";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc1irq @ 0x1d3;
    reg {
        name="adpbc0status";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc0status @ 0x1d4;
    reg {
        name="adpbc1status";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc1status @ 0x1d5;
    reg {
        name="adpbc2status";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc2status @ 0x1d6;
    reg {
        name="adpbc2irq";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } adpbc2irq @ 0x1d7;
    reg {
        name="isodctrl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } isodctrl @ 0x1d8;
    reg {
        name="isoautodump";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } isoautodump @ 0x1dc;
    reg {
        name="ep0maxpack";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ep0maxpack @ 0x1e0;
    reg {
        name="rxmaxpackBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxmaxpackBase @ 0x1e2;
    reg {
        name="rxstaddrBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } rxstaddrBase @ 0x304;
    reg {
        name="txstaddrBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txstaddrBase @ 0x344;
    reg {
        name="epirqBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } epirqBase @ 0x384;
    reg {
        name="cpuctrl";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } cpuctrl @ 0x3c0;
    reg {
        name="txmaxpackBase";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } txmaxpackBase @ 0x3e2;
} Registers_addrmap;


};