addrmap FocalTechFT9001_CPM {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="SleepConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SleepConfiguration @ 0x0;
    reg {
        name="SleepControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SleepControl @ 0x4;
    reg {
        name="SystemClockDivider";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemClockDivider @ 0x8;
    reg {
        name="SPeripheralClockDivider1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SPeripheralClockDivider1 @ 0xc;
    reg {
        name="SPeripheralClockDivider2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SPeripheralClockDivider2 @ 0x10;
    reg {
        name="SPeripheralClockDivider3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SPeripheralClockDivider3 @ 0x14;
    reg {
        name="ClockDividerUpdate";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClockDividerUpdate @ 0x18;
    reg {
        name="ClockDividerEnable";
        regwidth=0x20;
            field {
                sw = rw;
            } IPS_CLK_DIV_EN[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } AHB3_CLK_DIV_EN[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ARITH_CLK_DIV_EN[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MCC_CLK_DIV_EN[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ADC_CLK_DIV_EN[10:10];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } MESH_CLK_DIV_EN[12:12];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TC_CLK_DIV_EN[13:13];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TRACE_CLK_DIV_EN[14:14];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CLKOUT_CLK_DIV_EN[15:15];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } I2S_M_CLK_DIV_EN[22:22];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } I2S_S_CLK_DIV_EN[23:23];
    } ClockDividerEnable @ 0x1c;
    reg {
        name="OscillatorControlAndStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OSC8M_CLK_EN[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PMU128K_CLK_EN[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } USBPHY240M_CLK_EN[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OSC320M_CLK_EN[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OSCEXT_CLK_EN[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RTC32K_CLK_EN[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PMU2K_CLK_EN[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PLLNFC_EN[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } OSC8M_STABLE[8:8];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } PMU128K_STABLE[9:9];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } USBPHY240M_STABLE[10:10];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } OSC320M_STABLE[11:11];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } OSCEXT_STABLE[12:12];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } RTC32K_STABLE[13:13];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } PMU2K_STABLE[14:14];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } PLLNFC_STABLE[15:15];
    } OscillatorControlAndStatus @ 0x20;
    reg {
        name="ClockSwitchConfig";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SOC_CLK_SOURCE[1:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } CLKSEL_ST_OSC160M[9:9];
    } ClockSwitchConfig @ 0x24;
    reg {
        name="CoreTickTimer";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CoreTickTimer @ 0x28;
    reg {
        name="ChipConfig";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CHIPCFGR[31:0];
    } ChipConfig @ 0x2c;
    reg {
        name="PowerControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerControl @ 0x30;
    reg {
        name="SleepCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SleepCounter @ 0x34;
    reg {
        name="WakeUpCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WakeUpCounter @ 0x38;
    reg {
        name="MultipleClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MultipleClockGateControl @ 0x3c;
    reg {
        name="SystemClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemClockGateControl @ 0x40;
    reg {
        name="AHB3ClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AHB3ClockGateControl @ 0x44;
    reg {
        name="AlgorithmClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AlgorithmClockGateControl @ 0x48;
    reg {
        name="IPSClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IPSClockGateControl @ 0x4c;
    reg {
        name="VCCGeneralTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } VCCGeneralTrim @ 0x50;
    reg {
        name="VCCLowVoltageDetectTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } VCCLowVoltageDetectTrim @ 0x54;
    reg {
        name="VCCVRefTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } VCCVRefTrim @ 0x58;
    reg {
        name="VCCCoreTestMode";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } VCCCoreTestMode @ 0x5c;
    reg {
        name="OSC8MHzTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OSC8MHzTrim @ 0x60;
    reg {
        name="RESERVED0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED0 @ 0x64;
    reg {
        name="OSC320MHzTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OSC320MHzTrim @ 0x68;
    reg {
        name="CardLDOTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CardLDOTrim @ 0x6c;
    reg {
        name="OSCLStableTime";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OSCLStableTime @ 0x70;
    reg {
        name="OSCHStableTime";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OSCHStableTime @ 0x74;
    reg {
        name="OSCEStableTime";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OSCEStableTime @ 0x78;
    reg {
        name="PowerStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerStatus @ 0x7c;
    reg {
        name="EPortSLPConfig";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } EPortSLPConfig @ 0x80;
    reg {
        name="EPortClockGateControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } EPortClockGateControl @ 0x84;
    reg {
        name="EPortRSTCR";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } EPortRSTCR @ 0x88;
    reg {
        name="RTCTrim";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RTCTrim @ 0x8c;
    reg {
        name="PadWakeupInterruptControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PadWakeupInterruptControl @ 0x90;
    reg {
        name="WakeupFilterCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WakeupFilterCounter @ 0x94;
    reg {
        name="CardPowerOnCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CardPowerOnCounter @ 0x98;
    reg {
        name="RTC32kStableTime";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RTC32kStableTime @ 0x9c;
    reg {
        name="MemoryPowerDownSleepControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MemoryPowerDownSleepControl @ 0xa0;
    reg {
        name="RESERVED1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED1 @ 0xa4;
    reg {
        name="RESERVED2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED2 @ 0xa8;
    reg {
        name="MultipleResetControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MultipleResetControl @ 0xac;
    reg {
        name="SystemResetControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SystemResetControl @ 0xb0;
    reg {
        name="AHB3ResetControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AHB3ResetControl @ 0xb4;
    reg {
        name="AlgorithmResetControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } AlgorithmResetControl @ 0xb8;
    reg {
        name="IPSResetControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IPSResetControl @ 0xbc;
    reg {
        name="SleepConfiguration2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SleepConfiguration2 @ 0xc0;
    reg {
        name="RESERVED3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED3 @ 0xc4;
    reg {
        name="RESERVED4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED4 @ 0xc8;
    reg {
        name="RESERVED5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED5 @ 0xcc;
    reg {
        name="PowerDownCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerDownCounter @ 0xd0;
    reg {
        name="PowerOnCounter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PowerOnCounter @ 0xd4;
    reg {
        name="PCDivR4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PCDivR4 @ 0xd8;
    reg {
        name="RESERVED6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RESERVED6 @ 0xdc;
    reg {
        name="NFCPLLConfig";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } NFCPLLConfig @ 0xe0;
    reg {
        name="NFCPLLSTimer";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } NFCPLLSTimer @ 0xe4;
} Registers_addrmap;


};