addrmap ESP32_UART {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Fifo";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } No_name_1[7:0];
    } Fifo @ 0x0;
    reg {
        name="RawInterruptStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } No_name_2[19:0];
    } RawInterruptStatus @ 0x4;
    reg {
        name="MaskedInterruptStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MaskedInterruptStatus @ 0x8;
    reg {
        name="InterruptEnable";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } No_name_3[19:0];
    } InterruptEnable @ 0xc;
    reg {
        name="InterruptClear";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } No_name_4[19:0];
    } InterruptClear @ 0x10;
    reg {
        name="ClockDivider";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } CLKDIV[11:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } FRAG[23:20];
    } ClockDivider @ 0x14;
    reg {
        name="RxFilter";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } GLITCH_FILT[7:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } GLITCH_FILT_EN[8:8];
    } RxFilter @ 0x18;
    reg {
        name="Status";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXFIFO_CNT[9:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_DSRN[13:13];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } UART_CTSN[14:14];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } UART_RXD[15:15];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TXFIFO_CNT[25:16];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } UART_DTRN[29:29];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } UART_RTSN[30:30];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } UART_TXD[31:31];
    } Status @ 0x1c;
    reg {
        name="Config0";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_PARITY[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_PARITY_EN[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_BIT_NUM[3:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_STOPBIT_NUM[5:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_RXFIFO_RST[17:17];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_TXFIFO_RST[18:18];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_ERR_WR_MASK[26:26];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } UART_AUTOBAUD_EN[27:27];
    } Config0 @ 0x20;
    reg {
        name="Config1";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXFIFO_FULL_THRHD[9:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TXFIFO_EMPTY_THRHD[19:10];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DIS_RX_DAT_OVF[20:20];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RX_TOUT_FLOW_DIS[21:21];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RX_FLOW_EN[22:22];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RX_TOUT_EN[23:23];
    } Config1 @ 0x24;
    reg {
        name="MinLowPulseDuration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MinLowPulseDuration @ 0x28;
    reg {
        name="MinHighPulseDuration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MinHighPulseDuration @ 0x2c;
    reg {
        name="EdgeChangeCount";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RXD_EDGE_CNT[9:0];
    } EdgeChangeCount @ 0x30;
    reg {
        name="SoftwareFlowControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareFlowControl @ 0x34;
    reg {
        name="SleepMode";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SleepMode @ 0x38;
    reg {
        name="SoftwareFlowControlChar0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareFlowControlChar0 @ 0x3c;
    reg {
        name="SoftwareFlowControlChar1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SoftwareFlowControlChar1 @ 0x40;
    reg {
        name="TxBreakCharacter";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TxBreakCharacter @ 0x44;
    reg {
        name="IdleTime";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IdleTime @ 0x48;
    reg {
        name="RS485Mode";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RS485Mode @ 0x4c;
    reg {
        name="PreSequenceTiming";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PreSequenceTiming @ 0x50;
    reg {
        name="PostSequenceTiming";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PostSequenceTiming @ 0x54;
    reg {
        name="Timeout";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Timeout @ 0x58;
    reg {
        name="ATEscapeSequenceDetect";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ATEscapeSequenceDetect @ 0x5c;
    reg {
        name="ThresholdAndAllocation";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ThresholdAndAllocation @ 0x60;
    reg {
        name="TxFifoOffsetAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TxFifoOffsetAddress @ 0x64;
    reg {
        name="RxFifoOffsetAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RxFifoOffsetAddress @ 0x68;
    reg {
        name="TxRxStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TxRxStatus @ 0x6c;
    reg {
        name="HighPulse";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HighPulse @ 0x70;
    reg {
        name="LowPulse";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } LowPulse @ 0x74;
    reg {
        name="CoreClock";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SCLK_DIV_B[5:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SCLK_DIV_A[11:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SCLK_DIV_NUM[19:12];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SCLK_SEL[21:20];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SCLK_EN[22:22];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RST_CORE[23:23];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } TX_SCLK_EN[24:24];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } RX_SCLK_EN[25:25];
    } CoreClock @ 0x78;
    reg {
        name="Version";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Version @ 0x7c;
    reg {
        name="ID";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ID @ 0x80;
} Registers_addrmap;


};