addrmap STM32H7_FlashController {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="AccessControl";
        regwidth=0x20;
            field {
                sw = rw;
                reset=4'b111;
            } LATENCY[3:0];
            field {
                sw = rw;
                reset=2'b11;
            } WRHIGHFREQ[5:4];
    } AccessControl @ 0x0;
    reg {
        name="KeyBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } KeyBank1 @ 0x4;
    reg {
        name="OptionKey";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } FLASH_OPTKEYR[31:0];
    } OptionKey @ 0x8;
    reg {
        name="ControlBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlBank1 @ 0xc;
    reg {
        name="StatusBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } StatusBank1 @ 0x10;
    reg {
        name="ClearControlBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClearControlBank1 @ 0x14;
    reg {
        name="OptionControl";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change, Provider.";
                sw = rw;
                onwrite = woset;
                reset=1'b1;
            } OPTLOCK[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } OPTSTART[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } MER[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } OPTCHANGEERRIE[30:30];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SWAP_BANK[31:31];
    } OptionControl @ 0x18;
    reg {
        name="OptionStatusCurrent";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } FLASH_OPTSR_CUR[31:0];
    } OptionStatusCurrent @ 0x1c;
    reg {
        name="OptionStatusProgram";
        regwidth=0x20;
            field {
                sw = rw;
                reset=32'b100000001101010101011110000;
            } FLASH_OPTSR_PRG[31:0];
    } OptionStatusProgram @ 0x20;
    reg {
        name="OptionClearControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } OptionClearControl @ 0x24;
    reg {
        name="ProtectionAddressCurrentBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProtectionAddressCurrentBank1 @ 0x28;
    reg {
        name="ProtectionAddressProgramBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProtectionAddressProgramBank1 @ 0x2c;
    reg {
        name="SecureAddressCurrentBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SecureAddressCurrentBank1 @ 0x30;
    reg {
        name="SecureAddressProgramBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SecureAddressProgramBank1 @ 0x34;
    reg {
        name="WriteSectorProtectionCurrentBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteSectorProtectionCurrentBank1 @ 0x38;
    reg {
        name="WriteSectorProtectionProgramBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteSectorProtectionProgramBank1 @ 0x3c;
    reg {
        name="BootAddressCurrent";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BootAddressCurrent @ 0x40;
    reg {
        name="BootAddressProgram";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BootAddressProgram @ 0x44;
    reg {
        name="CRCControlBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCControlBank1 @ 0x50;
    reg {
        name="CRCStartAddressBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCStartAddressBank1 @ 0x54;
    reg {
        name="CRCEndAddressBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCEndAddressBank1 @ 0x58;
    reg {
        name="CRCData";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCData @ 0x5c;
    reg {
        name="ECCFailAddressBank1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ECCFailAddressBank1 @ 0x60;
    reg {
        name="KeyBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } KeyBank2 @ 0x104;
    reg {
        name="ControlBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ControlBank2 @ 0x10c;
    reg {
        name="StatusBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } StatusBank2 @ 0x110;
    reg {
        name="ClearControlBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClearControlBank2 @ 0x114;
    reg {
        name="ProtectionAddressCurrentBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProtectionAddressCurrentBank2 @ 0x128;
    reg {
        name="ProtectionAddressProgramBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ProtectionAddressProgramBank2 @ 0x12c;
    reg {
        name="SecureAddressCurrentBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SecureAddressCurrentBank2 @ 0x130;
    reg {
        name="SecureAddressProgramBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SecureAddressProgramBank2 @ 0x134;
    reg {
        name="WriteSectorProtectionCurrentBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteSectorProtectionCurrentBank2 @ 0x138;
    reg {
        name="WriteSectorProtectionProgramBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } WriteSectorProtectionProgramBank2 @ 0x13c;
    reg {
        name="CRCControlBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCControlBank2 @ 0x150;
    reg {
        name="CRCStartAddressBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCStartAddressBank2 @ 0x154;
    reg {
        name="CRCEndAddressBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCEndAddressBank2 @ 0x158;
    reg {
        name="ECCFailAddressBank2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ECCFailAddressBank2 @ 0x160;
} Registers_addrmap;


};