addrmap EFR32_GPIOPort {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="PortAControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortAControl @ 0x0;
    reg {
        name="PortAModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortAModeLow @ 0x4;
    reg {
        name="PortAModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortAModeHigh @ 0x8;
    reg {
        name="PortADataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortADataOut @ 0xc;
    reg {
        name="PortADataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortADataOutToggle @ 0x18;
    reg {
        name="PortADataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortADataIn @ 0x1c;
    reg {
        name="PortAUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortAUnlockedPins @ 0x20;
    reg {
        name="PortAOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortAOverVoltageDisable @ 0x28;
    reg {
        name="PortBControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBControl @ 0x30;
    reg {
        name="PortBModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBModeLow @ 0x34;
    reg {
        name="PortBModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBModeHigh @ 0x38;
    reg {
        name="PortBDataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBDataOut @ 0x3c;
    reg {
        name="PortBDataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBDataOutToggle @ 0x48;
    reg {
        name="PortBDataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBDataIn @ 0x4c;
    reg {
        name="PortBUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBUnlockedPins @ 0x50;
    reg {
        name="PortBOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortBOverVoltageDisable @ 0x58;
    reg {
        name="PortCControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCControl @ 0x60;
    reg {
        name="PortCModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCModeLow @ 0x64;
    reg {
        name="PortCModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCModeHigh @ 0x68;
    reg {
        name="PortCDataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCDataOut @ 0x6c;
    reg {
        name="PortCDataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCDataOutToggle @ 0x78;
    reg {
        name="PortCDataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCDataIn @ 0x7c;
    reg {
        name="PortCUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCUnlockedPins @ 0x80;
    reg {
        name="PortCOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortCOverVoltageDisable @ 0x88;
    reg {
        name="PortDControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDControl @ 0x90;
    reg {
        name="PortDModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDModeLow @ 0x94;
    reg {
        name="PortDModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDModeHigh @ 0x98;
    reg {
        name="PortDDataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDDataOut @ 0x9c;
    reg {
        name="PortDDataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDDataOutToggle @ 0xa8;
    reg {
        name="PortDDataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDDataIn @ 0xac;
    reg {
        name="PortDUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDUnlockedPins @ 0xb0;
    reg {
        name="PortDOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortDOverVoltageDisable @ 0xb8;
    reg {
        name="PortEControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEControl @ 0xc0;
    reg {
        name="PortEModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEModeLow @ 0xc4;
    reg {
        name="PortEModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEModeHigh @ 0xc8;
    reg {
        name="PortEDataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEDataOut @ 0xcc;
    reg {
        name="PortEDataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEDataOutToggle @ 0xd8;
    reg {
        name="PortEDataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEDataIn @ 0xdc;
    reg {
        name="PortEUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEUnlockedPins @ 0xe0;
    reg {
        name="PortEOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortEOverVoltageDisable @ 0xe8;
    reg {
        name="PortFControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFControl @ 0xf0;
    reg {
        name="PortFModeLow";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFModeLow @ 0xf4;
    reg {
        name="PortFModeHigh";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFModeHigh @ 0xf8;
    reg {
        name="PortFDataOut";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFDataOut @ 0xfc;
    reg {
        name="PortFDataOutToggle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFDataOutToggle @ 0x108;
    reg {
        name="PortFDataIn";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFDataIn @ 0x10c;
    reg {
        name="PortFUnlockedPins";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFUnlockedPins @ 0x110;
    reg {
        name="PortFOverVoltageDisable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PortFOverVoltageDisable @ 0x118;
    reg {
        name="ExternalInterruptPortSelectLow";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } EXTIPSEL[31:0];
    } ExternalInterruptPortSelectLow @ 0x400;
    reg {
        name="ExternalInterruptPortSelectHigh";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } EXTIPSEL[31:0];
    } ExternalInterruptPortSelectHigh @ 0x404;
    reg {
        name="ExternalInterruptPinSelectLow";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
                reset=32'b110010000100000011001000010000;
            } EXTIPINSEL[31:0];
    } ExternalInterruptPinSelectLow @ 0x408;
    reg {
        name="ExternalInterruptPinSelectHigh";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
                reset=32'b110010000100000011001000010000;
            } EXTIPINSEL[31:0];
    } ExternalInterruptPinSelectHigh @ 0x40c;
    reg {
        name="ExternalInterruptRisingEdgeTrigger";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } No_name_1[15:0];
    } ExternalInterruptRisingEdgeTrigger @ 0x410;
    reg {
        name="ExternalInterruptFallingEdgeTrigger";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } No_name_2[15:0];
    } ExternalInterruptFallingEdgeTrigger @ 0x414;
    reg {
        name="ExternalInterruptLevel";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ExternalInterruptLevel @ 0x418;
    reg {
        name="InterruptFlag";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } EXT[15:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EM4WU[31:16];
    } InterruptFlag @ 0x41c;
    reg {
        name="InterruptFlagSet";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } EXT[15:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EM4WU[31:16];
    } InterruptFlagSet @ 0x420;
    reg {
        name="InterruptFlagClear";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } EXT[15:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EM4WU[31:16];
    } InterruptFlagClear @ 0x424;
    reg {
        name="InterruptEnable";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } EXT[15:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EM4WU[31:16];
    } InterruptEnable @ 0x428;
    reg {
        name="EM4WakeUpEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } EM4WakeUpEnable @ 0x42c;
    reg {
        name="IORoutingPinEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IORoutingPinEnable @ 0x440;
    reg {
        name="IORoutingLocation";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } IORoutingLocation @ 0x444;
    reg {
        name="InputSense";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InputSense @ 0x450;
    reg {
        name="ConfigurationLock";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } LOCKKEY[15:0];
    } ConfigurationLock @ 0x454;
} Registers_addrmap;


};