addrmap SunxiMMC {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="ControlRegister";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } No_name_4[0:0];
            field {
                sw = rw;
            } No_name_1_[2:2];
            field {
                sw = rw;
            } No_name_2_[4:4];
            field {
                sw = rw;
            } No_name_3_[5:5];
    } ControlRegister @ 0x0;
    reg {
        name="ClockControlRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClockControlRegister @ 0x4;
    reg {
        name="TimeOutRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } TimeOutRegister @ 0x8;
    reg {
        name="BusWidthRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BusWidthRegister @ 0xc;
    reg {
        name="BlockSizeRegister";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
                reset=16'b1000000000;
            } No_name_5[15:0];
    } BlockSizeRegister @ 0x10;
    reg {
        name="ByteCountRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ByteCountRegister @ 0x14;
    reg {
        name="CommandRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandRegister @ 0x18;
    reg {
        name="CommandArgumentRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CommandArgumentRegister @ 0x1c;
    reg {
        name="ResponseRegister0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseRegister0 @ 0x20;
    reg {
        name="ResponseRegister1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseRegister1 @ 0x24;
    reg {
        name="ResponseRegister2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseRegister2 @ 0x28;
    reg {
        name="ResponseRegister3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseRegister3 @ 0x2c;
    reg {
        name="InterruptMaskRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptMaskRegister @ 0x30;
    reg {
        name="MaskedInterruptStatusRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } MaskedInterruptStatusRegister @ 0x34;
    reg {
        name="RawInterruptStatusRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RawInterruptStatusRegister @ 0x38;
    reg {
        name="StatusRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } StatusRegister @ 0x3c;
    reg {
        name="FifoWaterLevelRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FifoWaterLevelRegister @ 0x40;
    reg {
        name="FifoFunctionSelectRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FifoFunctionSelectRegister @ 0x44;
    reg {
        name="DebugEnableRegister";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DebugEnableRegister @ 0x50;
    reg {
        name="BusModeControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BusModeControl @ 0x80;
    reg {
        name="DescriptorListBaseAddress";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DescriptorListBaseAddress @ 0x84;
    reg {
        name="DmacStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DmacStatus @ 0x88;
    reg {
        name="DmacInterruptEnable";
        regwidth=0x20;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[31:0];
    } DmacInterruptEnable @ 0x8c;
    reg {
        name="ReadWriteFifo";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ReadWriteFifo @ 0x100;
} Registers_addrmap;


};