addrmap OpenTitan_FlashController {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="InterruptState";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
                onwrite = woclr;
            } prog_empty[0:0];
            field {
                sw = rw;
                onwrite = woclr;
            } prog_lvl[1:1];
            field {
                sw = rw;
                onwrite = woclr;
            } rd_full[2:2];
            field {
                sw = rw;
                onwrite = woclr;
            } rd_lvl[3:3];
            field {
                sw = rw;
                onwrite = woclr;
            } op_done[4:4];
            field {
                sw = rw;
                onwrite = woclr;
            } corr_err[5:5];
    } InterruptState @ 0x0;
    reg {
        name="InterruptEnable";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
            } prog_empty[0:0];
            field {
                sw = rw;
            } prog_lvl[1:1];
            field {
                sw = rw;
            } rd_full[2:2];
            field {
                sw = rw;
            } rd_lvl[3:3];
            field {
                sw = rw;
            } op_done[4:4];
            field {
                sw = rw;
            } corr_err[5:5];
    } InterruptEnable @ 0x4;
    reg {
        name="InterruptTest";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } prog_empty[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } prog_lvl[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } rd_full[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } rd_lvl[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } op_done[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } corr_err[5:5];
    } InterruptTest @ 0x8;
    reg {
        name="AlertTest";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } recov_err[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } fatal_std_err[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } fatal_err[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } fatal_prim_flash_alert[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } recov_prim_flash_alert[4:4];
    } AlertTest @ 0xc;
    reg {
        name="DisableFlashFunctionality";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VAL[3:0];
    } DisableFlashFunctionality @ 0x10;
    reg {
        name="ExecutionFetchesEnabled";
        regwidth=0x20;
            field {
                sw = rw;
            } EN[31:0];
    } ExecutionFetchesEnabled @ 0x14;
    reg {
        name="ControllerInit";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } VAL[0:0];
    } ControllerInit @ 0x18;
    reg {
        name="ControlEnable";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } EN[0:0];
    } ControlEnable @ 0x1c;
    reg {
        name="Control";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } START[0:0];
            field {
                sw = rw;
            } OP[5:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } PROG_SEL[6:6];
            field {
                sw = rw;
            } ERASE_SEL[7:7];
            field {
                sw = rw;
            } PARTITION_SEL[8:8];
            field {
                sw = rw;
            } INFO_SEL[10:9];
            field {
                sw = rw;
            } NUM[27:16];
    } Control @ 0x20;
    reg {
        name="AddressForFlashOperation";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
            } START[31:0];
    } AddressForFlashOperation @ 0x24;
    reg {
        name="EnableDifferentProgramTypes";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } NORMAL[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } REPAIR[1:1];
    } EnableDifferentProgramTypes @ 0x28;
    reg {
        name="SuspendErase";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = rw;
            } REQ[0:0];
    } SuspendErase @ 0x2c;
    reg {
        name="RegionConfigurationEnable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable0 @ 0x30;
    reg {
        name="RegionConfigurationEnable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable1 @ 0x34;
    reg {
        name="RegionConfigurationEnable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable2 @ 0x38;
    reg {
        name="RegionConfigurationEnable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable3 @ 0x3c;
    reg {
        name="RegionConfigurationEnable4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable4 @ 0x40;
    reg {
        name="RegionConfigurationEnable5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable5 @ 0x44;
    reg {
        name="RegionConfigurationEnable6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable6 @ 0x48;
    reg {
        name="RegionConfigurationEnable7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfigurationEnable7 @ 0x4c;
    reg {
        name="RegionConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration0 @ 0x50;
    reg {
        name="RegionConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration1 @ 0x54;
    reg {
        name="RegionConfiguration2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration2 @ 0x58;
    reg {
        name="RegionConfiguration3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration3 @ 0x5c;
    reg {
        name="RegionConfiguration4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration4 @ 0x60;
    reg {
        name="RegionConfiguration5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration5 @ 0x64;
    reg {
        name="RegionConfiguration6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration6 @ 0x68;
    reg {
        name="RegionConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionConfiguration7 @ 0x6c;
    reg {
        name="RegionBaseAndSizeConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration0 @ 0x70;
    reg {
        name="RegionBaseAndSizeConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration1 @ 0x74;
    reg {
        name="RegionBaseAndSizeConfiguration2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration2 @ 0x78;
    reg {
        name="RegionBaseAndSizeConfiguration3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration3 @ 0x7c;
    reg {
        name="RegionBaseAndSizeConfiguration4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration4 @ 0x80;
    reg {
        name="RegionBaseAndSizeConfiguration5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration5 @ 0x84;
    reg {
        name="RegionBaseAndSizeConfiguration6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration6 @ 0x88;
    reg {
        name="RegionBaseAndSizeConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RegionBaseAndSizeConfiguration7 @ 0x8c;
    reg {
        name="DefaultRegionConfiguration";
        regwidth=0x20;
            field {
                sw = rw;
            } RD_EN[3:0];
            field {
                sw = rw;
            } PROG_EN[7:4];
            field {
                sw = rw;
            } ERASE_EN[11:8];
            field {
                sw = rw;
            } SCRAMBLE_EN[15:12];
            field {
                sw = rw;
            } ECC_EN[19:16];
            field {
                sw = rw;
            } HE_EN[23:20];
    } DefaultRegionConfiguration @ 0x90;
    reg {
        name="Bank0Info0Enable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable0 @ 0x94;
    reg {
        name="Bank0Info0Enable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable1 @ 0x98;
    reg {
        name="Bank0Info0Enable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable2 @ 0x9c;
    reg {
        name="Bank0Info0Enable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable3 @ 0xa0;
    reg {
        name="Bank0Info0Enable4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable4 @ 0xa4;
    reg {
        name="Bank0Info0Enable5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable5 @ 0xa8;
    reg {
        name="Bank0Info0Enable6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable6 @ 0xac;
    reg {
        name="Bank0Info0Enable7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable7 @ 0xb0;
    reg {
        name="Bank0Info0Enable8";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable8 @ 0xb4;
    reg {
        name="Bank0Info0Enable9";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0Enable9 @ 0xb8;
    reg {
        name="Bank0Info0PageConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration0 @ 0xbc;
    reg {
        name="Bank0Info0PageConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration1 @ 0xc0;
    reg {
        name="Bank0Info0PageConfiguration2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration2 @ 0xc4;
    reg {
        name="Bank0Info0PageConfiguration3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration3 @ 0xc8;
    reg {
        name="Bank0Info0PageConfiguration4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration4 @ 0xcc;
    reg {
        name="Bank0Info0PageConfiguration5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration5 @ 0xd0;
    reg {
        name="Bank0Info0PageConfiguration6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration6 @ 0xd4;
    reg {
        name="Bank0Info0PageConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration7 @ 0xd8;
    reg {
        name="Bank0Info0PageConfiguration8";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration8 @ 0xdc;
    reg {
        name="Bank0Info0PageConfiguration9";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info0PageConfiguration9 @ 0xe0;
    reg {
        name="Bank0Info1Enable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info1Enable @ 0xe4;
    reg {
        name="Bank0Info1PageConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info1PageConfiguration @ 0xe8;
    reg {
        name="Bank0Info2Enable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info2Enable0 @ 0xec;
    reg {
        name="Bank0Info2Enable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info2Enable1 @ 0xf0;
    reg {
        name="Bank0Info2PageConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info2PageConfiguration0 @ 0xf4;
    reg {
        name="Bank0Info2PageConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank0Info2PageConfiguration1 @ 0xf8;
    reg {
        name="Bank1Info0Enable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable0 @ 0xfc;
    reg {
        name="Bank1Info0Enable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable1 @ 0x100;
    reg {
        name="Bank1Info0Enable2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable2 @ 0x104;
    reg {
        name="Bank1Info0Enable3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable3 @ 0x108;
    reg {
        name="Bank1Info0Enable4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable4 @ 0x10c;
    reg {
        name="Bank1Info0Enable5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable5 @ 0x110;
    reg {
        name="Bank1Info0Enable6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable6 @ 0x114;
    reg {
        name="Bank1Info0Enable7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable7 @ 0x118;
    reg {
        name="Bank1Info0Enable8";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable8 @ 0x11c;
    reg {
        name="Bank1Info0Enable9";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0Enable9 @ 0x120;
    reg {
        name="Bank1Info0PageConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration0 @ 0x124;
    reg {
        name="Bank1Info0PageConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration1 @ 0x128;
    reg {
        name="Bank1Info0PageConfiguration2";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration2 @ 0x12c;
    reg {
        name="Bank1Info0PageConfiguration3";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration3 @ 0x130;
    reg {
        name="Bank1Info0PageConfiguration4";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration4 @ 0x134;
    reg {
        name="Bank1Info0PageConfiguration5";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration5 @ 0x138;
    reg {
        name="Bank1Info0PageConfiguration6";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration6 @ 0x13c;
    reg {
        name="Bank1Info0PageConfiguration7";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration7 @ 0x140;
    reg {
        name="Bank1Info0PageConfiguration8";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration8 @ 0x144;
    reg {
        name="Bank1Info0PageConfiguration9";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info0PageConfiguration9 @ 0x148;
    reg {
        name="Bank1Info1Enable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info1Enable @ 0x14c;
    reg {
        name="Bank1Info1PageConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info1PageConfiguration @ 0x150;
    reg {
        name="Bank1Info2Enable0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info2Enable0 @ 0x154;
    reg {
        name="Bank1Info2Enable1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info2Enable1 @ 0x158;
    reg {
        name="Bank1Info2PageConfiguration0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info2PageConfiguration0 @ 0x15c;
    reg {
        name="Bank1Info2PageConfiguration1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Bank1Info2PageConfiguration1 @ 0x160;
    reg {
        name="HardwareInfoConfigurationOverride";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HardwareInfoConfigurationOverride @ 0x164;
    reg {
        name="BankConfigurationEnable";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
                reset=1'b1;
            } BANK[0:0];
    } BankConfigurationEnable @ 0x168;
    reg {
        name="BankConfiguration";
        regwidth=0x20;
            field {
                sw = rw;
            } ERASE_EN_0[0:0];
            field {
                sw = rw;
            } ERASE_EN_1[1:1];
    } BankConfiguration @ 0x16c;
    reg {
        name="FlashOperationStatus";
        regwidth=0x20;
            field {
                sw = rw;
            } done[0:0];
            field {
                sw = rw;
            } err[1:1];
    } FlashOperationStatus @ 0x170;
    reg {
        name="Status";
        regwidth=0x20;
            field {
                sw = r;
            } rd_full[0:0];
            field {
                sw = r;
                reset=1'b1;
            } rd_empty[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } prog_full[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } prog_empty[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } init_wip[4:4];
    } Status @ 0x174;
    reg {
        name="ErrorCode";
        regwidth=0x20;
            field {
                sw = rw;
                onwrite = woclr;
            } op_err[0:0];
            field {
                sw = rw;
                onwrite = woclr;
            } mp_err[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } rd_err[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_err[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_win_err[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_type_err[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } flash_macro[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } update_err[7:7];
    } ErrorCode @ 0x178;
    reg {
        name="FaultStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } op_err[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } mp_err[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } rd_err[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_err[3:3];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_win_err[4:4];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } prog_type_err[5:5];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } flash_macro_err[6:6];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } seed_err[7:7];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } phy_relbl_err[8:8];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } phy_storage_err[9:9];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } spurious_ack[10:10];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } arb_err[11:11];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } host_gnt_err[12:12];
    } FaultStatus @ 0x17c;
    reg {
        name="ErrorAddress";
        regwidth=0x20;
            field {
                sw = r;
            } ERR_ADDR[31:0];
    } ErrorAddress @ 0x180;
    reg {
        name="ECCSingleErrorCount";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ECC_SINGLE_ERR_CNT_0[7:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ECC_SINGLE_ERR_CNT_1[15:8];
    } ECCSingleErrorCount @ 0x184;
    reg {
        name="ECCSingleErrorAddress0";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ECC_SINGLE_ERR_ADDR_0[19:0];
    } ECCSingleErrorAddress0 @ 0x188;
    reg {
        name="ECCSingleErrorAddress1";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } ECC_SINGLE_ERR_ADDR_1[19:0];
    } ECCSingleErrorAddress1 @ 0x18c;
    reg {
        name="PhyErrorConfigurationEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PhyErrorConfigurationEnable @ 0x190;
    reg {
        name="PhyErrorConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PhyErrorConfiguration @ 0x194;
    reg {
        name="PhyAlertConfiguration";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } alert_ack[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } alert_trig[1:1];
    } PhyAlertConfiguration @ 0x198;
    reg {
        name="PhyStatus";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } init_wip[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
                reset=1'b1;
            } prog_normal_avail[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
                reset=1'b1;
            } prog_repair_avail[2:2];
    } PhyStatus @ 0x19c;
    reg {
        name="Scratch";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } data[31:0];
    } Scratch @ 0x1a0;
    reg {
        name="FifoLevel";
        regwidth=0x20;
            field {
                sw = rw;
                reset=5'b1111;
            } PROG[4:0];
            field {
                sw = rw;
                reset=5'b1111;
            } RD[12:8];
    } FifoLevel @ 0x1a4;
    reg {
        name="FifoReset";
        regwidth=0x20;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } EN[0:0];
    } FifoReset @ 0x1a8;
    reg {
        name="CurrengFifoLevel";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CurrengFifoLevel @ 0x1ac;
    reg {
        name="ProgramFifo";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } No_name_1[31:0];
    } ProgramFifo @ 0x1b0;
    reg {
        name="ReadFifo";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } No_name_2[31:0];
    } ReadFifo @ 0x1b4;
} Registers_addrmap;


};