addrmap RenesasDA14_ClockGenerationController {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="ClockAMBA";
        regwidth=0x20;
            field {
                sw = rw;
                reset=3'b10;
            } HCLK_DIV[2:0];
            field {
                sw = rw;
                reset=2'b1;
            } PCLK_DIV[5:4];
            field {
                sw = rw;
            } AES_CLK_ENABLE[6:6];
            field {
                sw = rw;
            } QDEC_CLK_ENABLE[7:7];
            field {
                sw = rw;
            } QSPI_DIV[11:10];
            field {
                sw = rw;
            } QSPI_ENABLE[12:12];
    } ClockAMBA @ 0x0;
    reg {
        name="ResetControl";
        regwidth=0x20;
            field {
                sw = rw;
            } GATE_RST_WITH_FCU[0:0];
            field {
                sw = rw;
            } SYS_CACHE_FLUSH_WITH_SW_RESET[1:1];
            field {
                sw = rw;
            } CMAC_CACHE_FLUSH_WITH_SW_RESET[2:2];
    } ResetControl @ 0xc;
    reg {
        name="RadioPLL";
        regwidth=0x20;
            field {
                sw = rw;
            } CMAC_CLK_ENABLE[0:0];
            field {
                sw = rw;
            } CMAC_CLK_SEL[1:1];
            field {
                sw = rw;
                reset=1'b1;
            } CMAC_SYNCH_RESET[2:2];
            field {
                sw = rw;
            } RFCU_ENABLE[3:3];
    } RadioPLL @ 0x10;
    reg {
        name="ClockControl";
        regwidth=0x20;
            field {
                sw = rw;
                reset=2'b1;
            } SYS_CLK_SEL[1:0];
            field {
                sw = rw;
            } LP_CLK_SEL[3:2];
            field {
                sw = rw;
            } XTAL32M_DISABLE[5:5];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RUNNING_AT_LP_CLOCK[12:12];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } RUNNING_AT_RC32M[13:13];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RUNNING_AT_XTAL32M[14:14];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RUNNING_AT_DBLR64M[15:15];
    } ClockControl @ 0x14;
    reg {
        name="ClockTimers";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClockTimers @ 0x18;
    reg {
        name="Switch2XTAL";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
                onwrite = woclr;
            } SWITCH2XTAL[0:0];
    } Switch2XTAL @ 0x1c;
    reg {
        name="PMUClock";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x20;
            field {
                sw = rw;
                reset=1'b1;
            } PERIPH_SLEEP[0:0];
            field {
                sw = rw;
                reset=1'b1;
            } RADIO_SLEEP[1:1];
            field {
                sw = rw;
                reset=1'b1;
            } TIM_SLEEP[2:2];
            field {
                sw = rw;
                reset=1'b1;
            } COM_SLEEP[3:3];
            field {
                sw = rw;
            } MAP_BANDGAP_EN[4:4];
            field {
                sw = rw;
            } RESET_ON_WAKEUP[5:5];
            field {
                sw = rw;
            } SYS_SLEEP[6:6];
            field {
                sw = rw;
            } RETAIN_CACHE[7:7];
            field {
                sw = rw;
            } LP_CLK_OUTPUT_EN[9:9];
            field {
                sw = rw;
                reset=1'b1;
            } AUD_SLEEP[10:10];
            field {
                sw = rw;
            } RETAIN_CMAC_CACHE[11:11];
    } PMUClock @ 0x20;
    reg {
        name="SystemControl";
        regwidth=0x20;
            field {
                sw = rw;
            } REMAP_ADDR0[2:0];
            field {
                sw = rw;
            } REMAP_INTVECT[3:3];
            field {
                sw = rw;
            } DEBUGGER_ENABLE[7:7];
            field {
                sw = rw;
            } CACHERAM_MUX[10:10];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
                onwrite = woclr;
            } SW_RESET[15:15];
    } SystemControl @ 0x24;
    reg {
        name="SystemStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } RAD_IS_DOWN[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } RAD_IS_UP[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } PER_IS_DOWN[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } PER_IS_UP[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } SYS_IS_DOWN[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } SYS_IS_UP[5:5];
            field {
                sw = r;
            } MEM_IS_DOWN[6:6];
            field {
                sw = r;
                reset=1'b1;
            } MEM_IS_UP[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } TIM_IS_DOWN[8:8];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } TIM_IS_UP[9:9];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } COM_IS_DOWN[10:10];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } COM_IS_UP[11:11];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
                reset=1'b1;
            } AUD_IS_DOWN[12:12];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } AUD_IS_UP[13:13];
            field {
                sw = r;
            } DBG_IS_ACTIVE[14:14];
            field {
                sw = r;
                reset=1'b1;
            } POWER_IS_UP[15:15];
    } SystemStatus @ 0x28;
    reg {
        name="ClockRCLP";
        regwidth=0x20;
            field {
                sw = rw;
            } RCLP_DISABLE[0:0];
            field {
                sw = rw;
            } RCLP_HIGH_SPEED_FORCE[1:1];
            field {
                sw = rw;
            } RCLP_LOW_SPEED_FORCE[2:2];
            field {
                sw = rw;
                reset=4'b111;
            } RCLP_TRIM[6:3];
    } ClockRCLP @ 0x3c;
    reg {
        name="ClockXTAL32";
        regwidth=0x20;
            field {
                sw = rw;
            } XTAL32K_ENABLE[0:0];
            field {
                sw = rw;
                reset=2'b11;
            } XTAL32K_RBIAS[2:1];
            field {
                sw = rw;
                reset=4'b101;
            } XTAL32K_CUR[6:3];
            field {
                sw = rw;
            } XTAL32K_DISABLE_AMPREG[7:7];
            field {
                sw = rw;
                reset=4'b100;
            } XTAL32K_VDDX_TRIM[12:9];
    } ClockXTAL32 @ 0x40;
    reg {
        name="ClockRC32M";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } RC32M_ENABLE[0:0];
            field {
                sw = rw;
                reset=4'b111;
            } RC32M_BIAS[4:1];
            field {
                sw = rw;
                reset=2'b10;
            } RC32M_RANGE[6:5];
            field {
                sw = rw;
                reset=4'b111;
            } RC32M_COSC[10:7];
    } ClockRC32M @ 0x44;
    reg {
        name="ClockRCX";
        regwidth=0x20;
            field {
                sw = rw;
            } RCX_ENABLE[0:0];
            field {
                sw = rw;
                reset=5'b11111;
            } RCX_CADJUST[5:1];
            field {
                sw = rw;
                reset=1'b1;
            } RCX_C0[6:6];
            field {
                sw = rw;
                reset=4'b1010;
            } RCX_BIAS[10:7];
    } ClockRCX @ 0x48;
    reg {
        name="ClockRTCDivisor";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ClockRTCDivisor @ 0x4c;
    reg {
        name="BandGap";
        regwidth=0x20;
            field {
                sw = rw;
            } BGR_TRIM[4:0];
            field {
                sw = rw;
            } BGR_ITRIM[10:6];
    } BandGap @ 0x50;
    reg {
        name="PadLatch0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PadLatch0 @ 0x70;
    reg {
        name="SetPadLatch0";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SetPadLatch0 @ 0x74;
    reg {
        name="ResetPadLatch0";
        regwidth=0x20;
            field {
                sw = rw;
            } P0_RESET_LATCH_EN[15:0];
    } ResetPadLatch0 @ 0x78;
    reg {
        name="PadLatch1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PadLatch1 @ 0x7c;
    reg {
        name="SetPadLatch1";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SetPadLatch1 @ 0x80;
    reg {
        name="ResetPadLatch1";
        regwidth=0x20;
            field {
                sw = rw;
            } P1_RESET_LATCH_EN[15:0];
    } ResetPadLatch1 @ 0x84;
    reg {
        name="PORPin";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PORPin @ 0x98;
    reg {
        name="PORTimer";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PORTimer @ 0x9c;
    reg {
        name="BiasVRef";
        regwidth=0x20;
            field {
                sw = rw;
            } BIAS_VREF_RF1_SEL[3:0];
            field {
                sw = rw;
            } BIAS_VREF_RF2_SEL[7:4];
    } BiasVRef @ 0xa4;
    reg {
        name="ResetStatus";
        regwidth=0x20;
            field {
                sw = rw;
                reset=1'b1;
            } PORESET_STAT[0:0];
            field {
                sw = rw;
                reset=1'b1;
            } HWRESET_STAT[1:1];
            field {
                sw = rw;
                reset=1'b1;
            } SWRESET_STAT[2:2];
            field {
                sw = rw;
                reset=1'b1;
            } WDOGRESET_STAT[3:3];
            field {
                sw = rw;
                reset=1'b1;
            } SWD_HWRESET_STAT[4:4];
            field {
                sw = rw;
                reset=1'b1;
            } CMAC_WDOGRESET_STAT[5:5];
    } ResetStatus @ 0xbc;
    reg {
        name="RamPwrControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } RamPwrControl @ 0xc0;
    reg {
        name="SecureBoot";
        regwidth=0x20;
            field {
                sw = rw;
            } PROT_CONFIG_SCRIPT[0:0];
            field {
                sw = rw;
            } PROT_APP_KEY[1:1];
            field {
                sw = rw;
            } PROT_VALID_KEY[2:2];
            field {
                sw = rw;
            } PROT_USER_APP_CODE[3:3];
            field {
                sw = rw;
            } FORCE_M33_DEBUGGER_OFF[4:4];
            field {
                sw = rw;
            } FORCE_CMAC_DEBUGGER_OFF[5:5];
            field {
                sw = rw;
            } SECURE_BOOT[6:6];
            field {
                sw = rw;
            } PROT_INFO_PAGE[8:8];
    } SecureBoot @ 0xcc;
    reg {
        name="BODControl";
        regwidth=0x20;
            field {
                sw = rw;
            } BOD_SEL_VDD_LVL[1:0];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } BIS_VDD_COMP[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } BOD_DIS_VDCDC_COMP[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } BOD_DIS_VDDIO_COMP[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
                reset=1'b1;
            } BOD_VDD_MASK[6:6];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
                reset=1'b1;
            } BOD_VDCDC_MASK[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = rw;
            } BOD_VDDIO_MASK[8:8];
    } BODControl @ 0xd0;
    reg {
        name="DiscargeRail";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DiscargeRail @ 0xd4;
    reg {
        name="AnalogStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BANDGAP_OK[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LDO_CORE_OK[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LDO_LOW_OK[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LDO_IO_OK[3:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_COMP_VDD_OK[4:4];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_COMP_VDDIO_OK[5:5];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_COMP_VDCDC_OK[6:6];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_COMP_VEFLASH_OK[7:7];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } LDO_GPADC_OK[8:8];
    } AnalogStatus @ 0xdc;
    reg {
        name="PowerControl";
        regwidth=0x20;
            field {
                sw = rw;
                reset=1'b1;
            } LDO_IO_ENABLE[0:0];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_LOW_ENABLE_ACTIVE[1:1];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_CORE_ENABLE[2:2];
            field {
                sw = rw;
            } LDO_IO_RET_ENABLE_ACTIVE[3:3];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_IO_RET_ENABLE_SLEEP[4:4];
            field {
                sw = rw;
            } LDO_IO_BYPASS_ACTIVE[5:5];
            field {
                sw = rw;
            } LDO_IO_BYPASS_SLEEP[6:6];
            field {
                sw = rw;
            } LDO_LOW_HIGH_CURRENT[7:7];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_LOW_ENABLE_SLEEP[8:8];
            field {
                sw = rw;
            } LDO_CORE_RET_ENABLE_ACTIVE[9:9];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_CORE_RET_ENABLE_SLEEP[10:10];
            field {
                sw = rw;
            } DCDC_ENABLE_SLEEP[11:11];
            field {
                sw = rw;
            } LDO_VREF_HOLD_FORCE[12:12];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_IO_RET_VREF_ENABLE[13:13];
            field {
                sw = rw;
                reset=1'b1;
            } LDO_CORE_RET_VREF_ENABLE[14:14];
    } PowerControl @ 0xe0;
    reg {
        name="PowerLevel";
        regwidth=0x20;
            field {
                sw = rw;
            } VDD_LEVEL_ACTIVE[2:0];
            field {
                sw = rw;
            } VDD_LEVEL_SLEEP[3:3];
            field {
                sw = rw;
            } VDCDC_LEVEL[6:4];
            field {
                sw = rw;
            } VDDIO_TRIM[10:7];
            field {
                sw = rw;
            } XTAL32M_LDO_LEVEL[12:11];
    } PowerLevel @ 0xe4;
    reg {
        name="HibernationControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } HibernationControl @ 0xf0;
    reg {
        name="PMUSleepControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } PMUSleepControl @ 0xf4;
    reg {
        name="StartUpStatus";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDCDC_MASK_SYNC_RD[0:0];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDDD_MASK_SYNC_RD[1:1];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDDIO_MASK_SYNC_RD[2:2];
            field {
                sw = r;
            } BOD_VDDD_LVL_RD[4:3];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDCDC_OK_SYNC_RD[5:5];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDDD_OK_SYNC_RD[6:6];
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } BOD_VDDIO_OK_SYNC_RD[7:7];
            field {
                sw = r;
            } BOD_VEFLASH_OK_SYNC[8:8];
            field {
                sw = r;
            } VEFLASH_LVL_RD[9:9];
    } StartUpStatus @ 0xfc;
} Registers_addrmap;


};