addrmap AmbiqApollo4_Watchdog {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="Configuration";
        desc = "This register has the following custom Renode callbacks: Change";
        regwidth=0x20;
            field {
                sw = rw;
            } WDTEN[0:0];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } INTEN[1:1];
            field {
                sw = rw;
            } RESEN[2:2];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } DSPRESETINTEN[3:3];
            field {
                sw = rw;
                reset=8'b11111111;
            } RESVAL[15:8];
            field {
                sw = rw;
                reset=8'b11111111;
            } INTVAL[23:16];
            field {
                sw = rw;
            } CLKSEL[26:24];
    } Configuration @ 0x0;
    reg {
        name="Restart";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Write.";
                sw = w;
            } No_name_1[7:0];
    } Restart @ 0x4;
    reg {
        name="Lock";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } Lock @ 0x8;
    reg {
        name="CounterValue";
        regwidth=0x20;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } COUNT[7:0];
    } CounterValue @ 0xc;
    reg {
        name="DSP0Configuration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0Configuration @ 0x10;
    reg {
        name="DSP0Restart";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0Restart @ 0x14;
    reg {
        name="DSP0Lock";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0Lock @ 0x18;
    reg {
        name="DSP0CounterValue";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0CounterValue @ 0x1c;
    reg {
        name="DSP1Configuration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1Configuration @ 0x20;
    reg {
        name="DSP1Restart";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1Restart @ 0x24;
    reg {
        name="DSP1Lock";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1Lock @ 0x28;
    reg {
        name="DSP1CounterValue";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1CounterValue @ 0x2c;
    reg {
        name="InterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptEnable @ 0x200;
    reg {
        name="InterruptStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptStatus @ 0x204;
    reg {
        name="InterruptClear";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptClear @ 0x208;
    reg {
        name="InterruptSet";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } InterruptSet @ 0x20c;
    reg {
        name="DSP0InterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0InterruptEnable @ 0x210;
    reg {
        name="DSP0InterruptStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0InterruptStatus @ 0x214;
    reg {
        name="DSP0InterruptClear";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0InterruptClear @ 0x218;
    reg {
        name="DSP0InterruptSet";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP0InterruptSet @ 0x21c;
    reg {
        name="DSP1InterruptEnable";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1InterruptEnable @ 0x220;
    reg {
        name="DSP1InterruptStatus";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1InterruptStatus @ 0x224;
    reg {
        name="DSP1InterruptClear";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1InterruptClear @ 0x228;
    reg {
        name="DSP1InterruptSet";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } DSP1InterruptSet @ 0x22c;
} Registers_addrmap;


};