addrmap NPCX_FIU {

addrmap {
    desc = "Generated by RenodeModelsAnalyzer";
    reg {
        name="BurstConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } BurstConfiguration @ 0x1;
    reg {
        name="ResponseConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } ResponseConfiguration @ 0x2;
    reg {
        name="SPIFlashConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } SPIFlashConfiguration @ 0x14;
    reg {
        name="UMACodeByte";
        regwidth=0x8;
            field {
                sw = rw;
            } TR_CODE_Transaction_Code[7:0];
    } UMACodeByte @ 0x16;
    reg {
        name="UMAAddressByte0_0";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } ADDR_Bi_Address_Byte_i[7:0];
    } UMAAddressByte0_0 [3]@ 0x17 += 1;
    reg {
        name="UMADataByte0_0";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } DAT_Bi_Data_Byte_i[7:0];
    } UMADataByte0_0 [4]@ 0x1a += 1;
    reg {
        name="UMAControlAndStatus";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                sw = rw;
            } D_SIZE_Data_Field_Size_Select[2:0];
            field {
                sw = rw;
            } A_SIZE_Address_Field_Size_Select[3:3];
            field {
                sw = rw;
            } C_SIZE_Code_Field_Size_Select[4:4];
            field {
                sw = rw;
            } RD_WR_Read_Write_Select[5:5];
            field {
                sw = rw;
            } EXEC_DONE_Operation_Execute_Done[7:7];
    } UMAControlAndStatus @ 0x1e;
    reg {
        name="UMAExtendedControlAndStatus";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Change.";
                sw = rw;
                reset=1'b1;
            } SW_CS1_Software_Controlled_Chip_Select_1n[1:1];
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SEC_CS_Secondary_Chip_Select[2:2];
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } UMA_LOCK_UMA_Operation_Lock[3:3];
            field {
                sw = rw;
            } UMA_ADDR_SIZE_Address_Field_Size_Select[6:4];
    } UMAExtendedControlAndStatus @ 0x1f;
    reg {
        name="UMADataByte1_0";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Provider.";
                sw = r;
            } DAT_Bi_Data_Byte_i[7:0];
    } UMADataByte1_0 [4]@ 0x20 += 1;
    reg {
        name="CRCControl";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCControl @ 0x26;
    reg {
        name="CRCResult";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } CRCResult @ 0x27;
    reg {
        name="FIUReadCommand";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FIUReadCommand @ 0x30;
    reg {
        name="FIUDummyCycle";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FIUDummyCycle @ 0x32;
    reg {
        name="FIUExtendedConfiguration";
        desc = "Could not determine register's width, guessed 8 bits.";
        regwidth=0x8;
            field {
                desc = "This is a dummy r/w field, generated just to show the register in specs";
                sw = rw;
            } DUMMY[7:0];
    } FIUExtendedConfiguration @ 0x33;
    reg {
        name="UMAAddressByte1_0";
        regwidth=0x8;
            field {
                desc = "This field has the following custom Renode callbacks: Write, Provider.";
                sw = rw;
            } ADDR_Bi_Address_Byte_i[7:0];
    } UMAAddressByte1_0 [4]@ 0x34 += 1;
    reg {
        name="SPI1Device";
        desc = "This register has the following custom Renode callbacks: Write";
        regwidth=0x8;
            field {
                desc = "The field is a Tag.";
                sw = rw;
            } SPI1_LO_DEV_SIZE_SPI0_Low_Device_size[3:0];
            field {
                sw = rw;
            } FOUR_BADDR_CS10_Four_Bytes_Address_for_Chip_Select_10[6:6];
            field {
                sw = rw;
            } FOUR_BADDR_CS11_Four_Bytes_Address_for_Chip_Select_11[7:7];
    } SPI1Device @ 0x3d;
} Registers_addrmap;


};