clint:
    // cpu0 IRQ connections are already automatically generated
    [4, 5] -> cpu1@[3, 7]
    [6, 7] -> cpu2@[3, 7]
    [8, 9] -> cpu3@[3, 7]

plic:
    // cpu0 IRQ connections are already automatically generated
    [3,4] -> cpu1@[11,9]
    [5,6] -> cpu2@[11,9]
    [7,8] -> cpu3@[11,9]
    prioritiesEnabled : false

ff0: Python.PythonPeripheral @ sysbus 0x10000004
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"
