SCG_CSR: Python.PythonPeripheral @ sysbus 0x40064010
    size: 0x4
    initable: true
    script: '''
# Spoof for the NXP FRDM clock initialization routines (SCS_CSR[27:24] = System Clock Source).
# Cycles most significant byte of this register (0x0 -> 0xF, wraps) on every read.
if request.IsInit:
    lastMultiplier = 0
if request.IsRead:
    lastMultiplier = (lastMultiplier + 1) % 16
    request.Value = lastMultiplier << 24
'''

sysbus:
    init add:
        ApplySVD @https://dl.antmicro.com/projects/renode/svd/MKE17Z7.svd.gz
        Tag <0x40064100 4> "SCG_SOSCCSR" 0x01000000
        Tag <0x40064200 4> "SCG_SIRCCSR" 0xFFFFFFFF
        Tag <0x40064300 4> "SCG_FIRCCSR" 0xFFFFFFFF
        Tag <0x40064500 4> "UNKNOWN3" 0xFFFFFFFF
